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74ALVCH16373_03 Datasheet PDF - STMicroelectronics

Part Number74ALVCH16373_03 ST-Microelectronics
STMicroelectronics ST-Microelectronics
DescriptionLOW VOLTAGE CMOS 16-BITD-TYPE LATCH (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
74ALVCH16373_03 Datasheet PDF : 74ALVCH16373_03 pdf   
74ALVCH16373 image

DESCRIPTION
The 74ALVCH16373 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs.
When the nLE is taken low, the nQ outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state.This device is designed to be used with 3 state memory address drivers, etc.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
   tPD = 3.6 ns (MAX.) at VCC = 3.0 to 3.6V
   tPD = 4.5 ns (MAX.) at VCC = 2.3 to 2.7V
   tPD = 6.5 ns (MAX.) at VCC = 1.65V
■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 24mA (MIN) at VCC = 3.0V
   |IOH| = IOL = 18mA (MIN) at VCC = 2.3V
   |IOH| = IOL = 4mA (MIN) at VCC = 1.65V
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 1.65V to 3.6V
■ BUS HOLD PROVIDED ON DATA INPUTS
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16373
■ LATCH-UP PERFORMANCE EXCEEDS
   300mA (JESD 17)
■ ESD PERFORMANCE:
   HBM > 2000V (MIL STD 883 method 3015);
   MM > 200V

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