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NB100LVEP222FAG Datasheet PDF - ON Semiconductor

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  2015  
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NB100LVEP222FAG Datasheet PDF : NB100LVEP222FAG pdf     
NB100LVEP222 image

The NB100LVEP222 is a low skew 1:15 differential ÷1/÷2 ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be used in a differential configuration or single−ended (with VBB output reference bypassed and connected to the unused input of a pair). Either of two fully differential clock inputs may be selected. Each of the four output banks of 2, 3, 4, and 6 differential pairs may be independently configured to fanout 1X or 1/2X of the input frequency. When the output banks are configured with the 1 mode, data can also be distributed. The LVEP222 specifically guarantees low output to output skew. Optimal design, layout, and processing minimize skew within a device and from lot to lot. This device is an improved version of the MC100LVE222 with higher speed capability and reduced skew.

• 20 ps Output−to−Output Skew
• 85 ps Part−to−Part Skew
• Selectable 1x or 1/2x Frequency Outputs
• LVPECL Mode Operating Range: VCC/VCC0 = 2.375 V to 3.8 V with VEE = 0 V
• NECL Mode Operating Range: VCC/VCC0 = 0 V with VEE = −2.375 V to −3.8 V
• Internal Input Pulldown Resistors
• Performance Upgrade to ON Semiconductor’s MC100LVE222
• VBB Output
• Pb−Free Packages are Available*

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PDF
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ECL/PECL 1:9 Differential Clock Driver
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