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NB100LVEP221FAR2 Datasheet PDF - ON Semiconductor

Part NameDescriptionManufacturer
NB100LVEP221FAR2 2.5V/3.3V1:20 Differential HSTL/ECL/PECL Clock Driver ON-Semiconductor
ON Semiconductor ON-Semiconductor
Other PDF  2003  
NB100LVEP221FAR2 Datasheet PDF : NB100LVEP221FAR2 pdf   
NB100LVEP221 image

Description
The NB100LVEP221 is a low skew 1−to−20 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The two clock inputs are differential ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The LVPECL input signals can be either differential configuration or single−ended (if the VBB output is used).

Features
• 15 ps Typical Output−to−Output Skew
• 40 ps Typical Device−to−Device Skew
• Jitter Less than 2 ps RMS
• Maximum Frequency > 1.0 GHz Typical
• Thermally Enhanced 52−Lead LQFP
• VBB Output
• 540 ps Typical Propagation Delay
• LVPECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = −2.375 V to −3.8 V
• Q Output will Default Low with Inputs Open or at VEE
• Pin Compatible with Motorola MC100EP221
• Pb−Free Packages are Available*

 

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