8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output
High−Performance Silicon−Gate CMOS
The MC74HC589A device consists of an 8−bit storage latch which feeds parallel data to an 8−bit shift register. Data can also be loaded serially (see the Function Table). The shift register output, QH, is a 3−state output, allowing this device to be used in bus−oriented systems.
The HC589A directly interfaces with the SPI serial data port on CMOS MPUs and MCUs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1 μA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7 A
• Chip Complexity: 526 FETs or 131.5 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable