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DM74LS107AN Datasheet PDF - National-Semiconductor

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Part NumberDM74LS107AN National-Semiconductor
National ->Texas Instruments National-Semiconductor
DescriptionDual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
DM74LS107AN Datasheet PDF : DM74LS107AN pdf   
DM54LS107A image

General Description
This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse. The data on the J and K inputs may change while the clock is high or low without affecting the outputs as long as setup and hold times are not violated. A low logic level on the clear input will reset the outputs regardless of the logic levels of the other inputs.

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