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74LV123D,118 Datasheet PDF - NXP Semiconductors.

Part Name
Description
Manufacturer
Other PDF
  2016  
PDF
74LV123D,118 Datasheet PDF : 74LV123D,118 pdf     
74LV123 image

General description
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC123; 74HCT123.
   
Features and benefits
■ Optimized for low-voltage applications: 1.0 V to 5.5 V
■ Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
■ Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25°C
■ Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
    Tamb = 25°C
■ DC triggered from active HIGH or active LOW inputs
■ Retriggerable for very long pulses up to 100 % duty factor
■ Direct reset terminates output pulses
■ Schmitt-trigger action on all inputs except for the reset input
   

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