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74HC4051-Q100 Datasheet PDF - NXP Semiconductors.

Part Number74HC4051-Q100 NXP
NXP Semiconductors. NXP
Description8-channel analog multiplexer/demultiplexer
74HC4051-Q100 Datasheet PDF : 74HC4051-Q100 pdf   
74HC4051-Q100 image

General description
The 74HC4051-Q100; 74HCT4051-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC standard no. 7A.
The 74HC4051-Q100; 74HCT4051-Q100 is an 8-channel analog multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.

Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
  Specified from -40℃  to +85℃ and from -40℃ to +125℃
Wide analog input voltage range from -5 V to +5 V
Low ON resistance:
  80Ω(typical) at VCC  -  VEE = 4.5 V
  70Ω(typical) at VCC  -  VEE = 6.0 V
  60Ω(typical) at VCC  -  VEE = 9.0 V
Logic level translation: to enable 5 V logic to communicate with 5 V analog signals
Typical ‘break before make’ built-in
ESD protection:
  MIL-STD-883, method 3015 exceeds 2000 V
  HBM JESD22-A114F exceeds 2000 V
  MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0Ω)
  CDM AEC-Q100-011 revision B exceeds 1000 V
Multiple package options

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