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74AHC138D-Q100 Datasheet PDF - NXP Semiconductors.

Part NameDescriptionManufacturer
74AHC138D-Q100 3-to-8 line decoder/demultiplexer; inverting NXP
NXP Semiconductors. NXP
Other PDF  no available.
74AHC138D-Q100 Datasheet PDF : 74AHC138D-Q100 pdf   
74AHC138BQ-Q100X image

General description
The 74AHC138-Q100; 74AHCT138-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.
   
Features and benefits
■ Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    ◆ Specified from -40°C to +85°C and from -40°C to +125°C
■ Balanced propagation delays
■ All inputs have Schmitt-trigger action
■ Demultiplexing capability
■ Multiple input enable for easy expansion
■ Ideal for memory chip select decoding
■ Inputs accept voltages higher than VCC
■ For 74AHC138-Q100 only: operates with CMOS input levels
■ For 74AHCT138-Q100 only: operates with TTL input levels
■ ESD protection:
    ◆ MIL-STD-883, method 3015 exceeds 2000 V
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
■ Multiple package options
   

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