* Access Times of 50*, 60, 70, 90, 120, 150ns
* Packaging: 32 pin, Rectangular Ceramic Leadless Chip Carrier (Package 601)
* 100,000 Erase/Program Cycles Minimum
* 2.5V I/O (SSTL_2 compatible)
* Sector Erase Architecture
* 8 equal size sectors of 16KBytes each
* Any combination of sectors can be concurrently erased. Also supports full chip erase
* Organized as 128Kx8
* Commercial, Industrial and Military Temperature Ranges
* 5 Volt Programming
* Low Power CMOS
* Embedded Erase and Program Algorithms
* TTL Compatible Inputs and CMOS Outputs
* Page Program Operation and Internal Program Control Time.
* The access time of 50ns is available in industrial and commercial temperature ranges only.