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FIN1001M5X Datasheet PDF - Fairchild Semiconductor

Part NameDescriptionManufacturer
FIN1001M5X 3.3V LVDS 1-Bit High Speed Differential Receiver Fairchild
Fairchild Semiconductor Fairchild
Other PDF  2002  
FIN1001M5X Datasheet PDF : FIN1001M5X pdf   
FIN1001M5 image

General Description
This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data.
The FIN1001 can be paired with its companion receiver, the FIN1002, or with any other LVDS receiver.
   
Features
■ Greater than 600Mbs data rate
■ 3.3V power supply operation
■ 0.5ns maximum differential pulse skew
■ 1.5ns maximum propagation delay
■ Low power dissipation
■ Power-Off protection
■ Meets or exceeds the TIA/EIA-644 LVDS standard
■ Flow-through pinout simplifies PCB layout
■ 5-Lead SOT23 package saves space
   

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