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74F113 Datasheet PDF - Fairchild Semiconductor

Part NameDescriptionManufacturer
74F113 Dual JK Negative Edge-Triggered Flip-Flop Fairchild
Fairchild Semiconductor Fairchild
Other PDF  no available.
74F113 Datasheet PDF : 74F113 pdf   
74F113 image

General Description
The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered.
The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as long as minimum setup and hold times are observed.

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