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AM79C982 Datasheet PDF - Advanced Micro Devices

Part NameDescriptionManufacturer
AM79C982 basic Integrated Multiport Repeater (bIMR) AMD
Advanced Micro Devices AMD
AM79C982 Datasheet PDF : AM79C982 pdf   
AM79C982 image

GENERAL DESCRIPTION
The basic Integrated Multiport Repeater (bIMR™) chip is a VLSI circuit that provides a system-level solution to designing a compliant 802.3 repeater incorporating 10BASE-T transceivers. The device integrates the Repeater functions specified by Section 9 of the IEEE 802.3 standard and twisted-pair Transceiver functions complying to the 10BASE-T standard. The Am79C982-4 provides four and the Am79C982-8 provides eight integral twisted-pair medium attachment units (MAUs), and an attachment unit interface (AUI) port in an 84-pin plastic leaded chip carrier (PLCC).

DISTINCTIVE CHARACTERISTICS
■ Fully backward-compatible with existing IMR/IMR+ device non-managed hub designs
   — Pin/socket-compatible with the Am79C980 (IMR) and Am79C981 (IMR+) devices
■ Repeater functions comply with IEEE 802.3 Repeater Unit specifications
■ Four and eight 10BASE-T port options available
■ Low-cost, flexible solutions suitable for non-managed repeater designs
■ Integral 10BASE-T transceivers utilize the required predistortion transmission technique
■ Attachment unit interface (AUI) port allows connectivity with 10BASE-5 (Ethernet) and 10BASE-2 (Cheapernet) networks, as well as 10BASE-F and/or Fiber Optic Inter-Repeater Link (FOIRL) segments
■ Minimum mode facilitates LED implementation and provides four LED display options for port status
■ Built-in pulse stretching for carrier sense LED display
■ On-board PLL, Manchester encoder/decoder, LED display and FIFO
■ Expandable to increase number of repeater ports
■ All ports can be separately isolated (partitioned) in response to excessive collision conditions or fault conditions
■ Network management and optional features are accessible through a dedicated serial management port
■ Twisted-pair Link Test capability conforming to the 10BASE-T standard.The receive Link Test function can be optionally disabled through the management port to facilitate interoperability with devices that do not implement the LinkTest function
■ Programmable option of Automatic Polarity Detection and Correction permits automatic recovery due to wiring errors
■ Full amplitude and timing regeneration for retransmitted waveforms
■ Preamble loss effects eliminated by deep FIFO
■ CMOS device features high integration and low power with a single +5 V supply

 

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