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Part Name(s) : LC74201JE SANYO
SANYO -> Panasonic
Description : SINGLE CHIP MPEG DECODER

Overview
The LC74201JE is a CMOS IC that integrates the signal processing functions required of a video CD DECODER to a SINGLE CHIP. All that it takes to make a version 1 or version 2 video CD player is the addition of a CD digital signal processor, DRAM, an audio D/A converter, digital video encoder, and similar components.

Features
• Incorporation of virtually almost all the functionality required by a video CD player from the CD-ROM DECODER through to the MPEG audio and video DECODERs in a SINGLE CHIP
• Fully automatic playback with automatic decoding within the LSI in response to simple external commands and the MPEG bit stream
• Special playback functions are activated by command inputs, and do not require signal processing by the host microcontroller
• Support for two external DRAM configurations: 4 M bits (256k × 16 bits) or 4 M bits (256k × 16 bits) + 1 M bit (64k × 16 bits)
• Support for a Track 1 DRAM user area (i.e., sector buffer) of up to 8 k bytes (4 M bits of external DRAM) or 22 k bytes (4 M +1 M bits of external DRAM)
• Automatic synchronization of audio and video
• Built-in high-speed DECODER core that supports variablespeed video playback at up to quadruple speed. Audio support for normal and double-speed playback.
• Internal registers that offer configuration settings for connecting to most commercially available CD digital signal processors and D/A converters
• Compatible with version 2 of the video CD standard. Support for superimposition of closed caption data on the output signal as specified in the EIA608 standard
• Support for Photo CD standard. (Base/4 and Base/16)

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Part Name(s) : BCM7412 Broadcom
Broadcom Corporation
Description : AVC/VC-1/MPEG HIGH-DEFINITION DECODER

FUNCTIONAL COMPONENTS

• H.264/MPEG-4 part 10 DECODER
• VC-1 Advanced, Simple, Main DECODER
MPEG-2 DECODER
• Programmable audio DECODER
• Transport demultiplexer
• Still Image DECODER (SID)
• HD-compatible digital video output port
• Multi-host control/status interface
• DDR SDRAM controller
 

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Part Name(s) : STA015 STA015B STA015T ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY

DESCRIPTION
The STA015 is a fully integrated high flexibility MPEG Layer III Audio DECODER, capable of decoding Layer III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO stand ards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.

APPLICATIONS
PC SOUND CARDS
MULTIMEDIA PLAYERS
VOICE RECORDERS

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Part Name(s) : STA003T ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER

DESCRIPTION
The STA003T is a fully integrated high flexibility MPEG Layer III Audio DECODER, capable of decoding Layer III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO standards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.

SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING:
    - All features specified for Layer III in ISO/IEC 11172-3 (MPEG 1 Audio) except 44.1KHz Audio
    - All features specified for Layer III 2 channels in ISO/IEC13818-3.2 (MPEG 2 Audio) except 22.05KHz Audio
    - Lower sampling frequencies syntax extension, (not specified by ISO) called MPEG 2.5 except 11.025KHz Audio
■ DECODES LAYER III STEREO CHANNELS, DUAL CHANNEL, SINGLE CHANNEL (MONO)
■ SUPPORTING THE MPEG 1 & 2 SAMPLING FREQUENCIES AND THE EXTENSION TO MPEG 2.5: 48, 32, 24, 16, 12, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH DATA RATE FROM 8 Kbit/s UP TO 128 Kbit/s
■ DIGITAL VOLUME CONTROL
■ DIGITAL BASS & TREBLE CONTROL
■ SERIAL BITSTREAM INPUT INTERFACE
■ ANCILLARY DATA EXTRACTION VIA I2C INTERFACE.
■ SERIAL PCM OUTPUT INTERFACE (I2S AND OTHER FORMATS)
■ PLL FOR INTERNAL CLOCK AND FOR OUTPUT PCM CLOCK GENERATION
■ LOW POWER DATA ELABORATION FOR POWER CONSUMPTION OPTIMISATION
■ CRC CHECK AND SYNCHRONISATION ERROR DETECTION WITH SOFTWARE INDICATORS
■ I2C CONTROL BUS
■ LOW POWER 3.3V CMOS TECHNOLOGY
■ 14.72MHz EXTERNAL INPUT CLOCK OR BUILT-IN XTAL OSCILLATOR

APPLICATIONS
■ STARMAN SATELLITE RADIO RECEIVER

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Part Name(s) : STA016 STA016A ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER SUPPORTING CD-ROM CAPABILITY

DESCRIPTION
The STA016A is a SINGLE CHIP MPEG 1, 2 and 2.5 Layer III audio DECODER with embedded CDROM decoding capability. It can be easily connected to most existing CDDSP devices via a software configurable serial link. A tipical application block diagram is show in Figure 1. The audio sources, for instance could be an external flash memory.

FEATURES
SINGLE CHIP MPEG LAYER 3 DECODER SUPPORTING:
– All features specified for Layer III in ISO/IEC 11172-3 (MPEG 1 Audio)
– All features specified for Layer III in ISO/IEC 13818-3.2 (MPEG 2 Audio)
– Lower sampling frequencies syntax extension, (not specified by ISO) called MPEG 2.5
■ DECODES LAYER III STEREO CHANNELS, DUAL CHANNEL, SINGLE CHANNEL (MONO)
■ SUPPORTING ALL THE MPEG 1 & 2 SAMPLING FREQUENCIES AND THE EXTENSION TO MPEG 2.5:48, 44.1,32, 24,22.05, 16, 12,11. 025, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH DATA RATE FROM 8 Kbit/s UP TO 320
Kbit/s
■ BYPASS MODE FOR EXTERNAL AUXILIARY AUDIO SOURCE
■ EMBEDDED ISO9660 LAYER FOR FILE SYSTEM DECODING (JOLIET)
■ EMBEDDED CD-ROM DECODER BLOCKS INCLUDING ECC/EDC CAPABILITY
■ FLEXIBLE I2S INPUT INTERFACE FOR EASY CONNECTION WITH MOST CD-SERVO DEVICES
■ EMBEDDED BROWSING COMMAND INTERPRETER FOR EASY FILE-SYSTEM BROWSING
■ CUE-SHEET CAPABILITY UP TO 100 ENTRIES
■ BROWSER COMMAND INTERPRETER (BCI)
– Parent Dir
– Enter Dir
– Previous Entry
– Next Entry
– Get Record Infos
■ EASY PROGRAMMABLE GPSO INTERFACE (MONO/STEREO) FOR ENCODED DATA UP TO 5Mbit/s
■ DIGITAL VOLUME

APPLICATIONS
■ AUDIO CD PLAYERS
■ MULTIMEDIA PLAYERS
■ CD-ROM PLAYERS
■ CAR RADIO PLAYERS

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Part Name(s) : STA013 STA013T STA013B ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER

DESCRIPTION
The STA013 is a fully integrated high flexibility MPEG Layer III Audio DECODER, capable of decoding Layer III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO standards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.
   
SINGLE CHIP MPEG2 LAYER 3 DECODER
    SUPPORTING:
    - All features specified for Layer III in ISO/IEC
        11172-3 (MPEG 1 Audio)
    - All features specified for Layer III in ISO/IEC
        13818-3.2 (MPEG 2 Audio)
    - Lower sampling frequencies syntax extension,
        (not specified by ISO) called MPEG 2.5
■ DECODES LAYER III STEREO CHANNELS,
    DUAL CHANNEL, SINGLE CHANNEL
    (MONO)
■ SUPPORTING ALL THE MPEG 1 & 2 SAMPLING
    FREQUENCIES AND THE EXTENSION TO MPEG 2.5:
    48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH
    DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s
■ DIGITAL VOLUME CONTROL
■ DIGITAL BASS & TREBLE CONTROL
■ SERIAL BITSTREAM INPUT INTERFACE
■ ANCILLARY DATA EXTRACTION VIA I2C INTERFACE.
■ SERIAL PCM OUTPUT INTERFACE (I2S
    AND OTHER FORMATS)
    PLL FOR INTERNAL CLOCK AND FOR OUTPUT PCM CLOCK GENERATION
■ LOW POWER CONSUMPTION:
    85mW AT 2.4V
■ CRC CHECK AND SYNCHRONISATION ERROR DETECTION
    WITH SOFTWARE INDICATORS
■ I2C CONTROL BUS
■ LOW POWER 3.3V CMOS TECHNOLOGY
■ 10 MHz, 14.31818 MHz, OR 14.7456 MHz
    EXTERNAL INPUT CLOCK OR BUILT-IN INDUSTRY STANDARD
    XTAL OSCILLATOR DIFFERENT FREQUENCIES MAY BE
    SUPPORTED UPON REQUEST TO STM
   
APPLICATIONS
■ PC SOUND CARDS
■ MULTIMEDIA PLAYERS
   

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Part Name(s) : W9925 W9925PF Winbond
Winbond
Description : MPEG-1 A/V SYSTEM DECODER

GENERAL DESCRIPTION
The W9925PF is a high-performance SINGLE-CHIP MPEG-1 DECODER. It performs real-time decompression of ISO/IEC-11172 MPEG (Moving Picture Experts Group) streams, including system layer, audio and video data. This CHIP incorporates an 8-bit host interface and a CD interface that make it an easy use in standalone applications.
   
FEATURES
• High integration of MPEG system, audio and video decoding,
    video scan timing generation, and CD-ROM
    decoding functions
• Applicable to ISO/IEC 11172 system streams, CD-DA data, and CD-ROM data
• Fully supports Karaoke CD, Video CD 1.1, Video CD 2.0 and CD-I FMV specifications
• Real-time decompression and synchronization of MPEG bitstreams
    with SIF resolution video and two
    channels of Layer 1 or Layer 2 audio
• Automatic frame rate conversion during A/V playback
• Decompression of high resolution still pictures(704x480(NTSC) or 704x576(PAL))
• Optional horizontal and vertical interpolation for image quality enhancement
• Automatic IO address setup
• Fade in/out control and brightness adjustment  (Continue ...)
   

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Part Name(s) : SPHE8200A ETC1
Unspecified
Description : DVD SINGLE CHIP MPEG AV Processor

[Sunplus Technology Co.,Ltd.]

GENERAL DESCRIPTION
SPHE8200A A/V DECODER is a SINGLE-CHIP integrated DVD A/V DECODER.  It performs real-time decoding and playback of ISO/IEC 11172 MPEG1 and 13818 MPEG2 stream for multiple bit stream sources.

 

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Part Name(s) : MAS35X9F MAS3509F MAS3519F MAS3529F MAS3539F MAS3549F MAS3559F Micronas
Micronas
Description : MPEG Layer 2/3, AAC Audio DECODER, G.729 Annex A Codec

 Introduction
The MAS 35x9F is a SINGLE-CHIP, low-power MPEG layer 2/3 and MPEG2-AAC audio stereo DECODER. It also contains the G.729 Annex A speech compression and decompression technology for use in memorybased or broadcast applications. Additional functionality is achievable via download software (e.g., CELP voice DECODER, Micronas SC4 (ADPCM) encoder/DECODER).

Features
Firmware
MPEG 1/2 layer 2 and layer 3 DECODER
– Extension to MPEG 2 layer 3 for low sampling rates (“MPEG 2.5”)
– Extraction of MPEG Ancillary Data
MPEG 2 AAC DECODER (low-complexity profile)
– Micronas G.729 Annex A speech compression and decompression
– Master or slave clock operation
– Adaptive bit rates (bit rate switching)
– Intelligent power management (processor clock is dependent on sampling frequencies)
– SDMI-compliant security technology
– Stereo channel mixer
– Bass, treble, and loudness function
– Micronas Bass (MB)
– Automatic Volume Control (AVC)

Interfaces
– Two serial asynchronous interfaces for bit streams and uncompressed digital audio
– Parallel handshake bit stream input
– Serial audio output via I2S and related formats
– S/PDIF data input and output
– Controlling via I2C interface

Hardware Features
– Two independent embedded DC/DC converters, (e.g., for DSP and flash RAM supply)
– Low DC/DC converter start-up voltage (0.9 V)
– DC converter efficiency up to 95%
– Battery voltage monitor
– Low supply voltage down to 2.2 V
– Low power dissipation, e.g., 87 mW (128kBit/s, 44.1 kHz, Headphone playback)
– High-performance RISC DSP core
– On-CHIP crystal oscillator
– Hardware power management and power-off functions
– Microphone amplifier
– Stereo A/D converter for FM/AM-radio and speech input
– CD quality stereo D/A converter
– Headphone amplifier
– Noise and power-optimized volume
– External clock or crystal frequency of 13...28 MHz
– Standby current < 10 µA

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Part Name(s) : MAS3507D Micronas
Micronas
Description : MPEG 1/2 Layer 2/3 Audio DECODER

The MAS 3507D is a SINGLE-CHIP MPEG layer 2/3 audio DECODER for use in audio broadcast or memory-based playback applications. Due to embedded memories, the embedded DC/DC up-converter, and the very low power consumption, the MAS 3507D is ideally suited for portable electronics.
In MPEG 1 (ISO 11172-3), three hierarchical layers of compression have been standardized. The most sophisticated and complex, layer 3, allows compression rates of approximately 12:1 for mono and stereo signals while still maintaining CD audio quality. Layer 2 (widely used in DVB, ADR, and DAB) achieves a compression of 8:1 providing CD quality.

Features
– Serial asynchronous MPEG bit stream input (SDI)
– Parallel (PIO-DMA) Input
– Broadcast and multimedia operation mode
– Automatic locking to given data rate in broadcast mode
– Data request triggered by ’demand signal’ in multi media mode
– Output audio data delivered (in various formats) via an I2S bus (SDO)
– Digital volume / stereo channel mixer / Bass / Treble
– Output sampling clocks are generated and controlled internally.
– Ancillary data provided via I2C interface
– Status information accessible via PIO pins or I2C
– “CRC Error” and “MPEG Frame Synchronization” Indicators at Pins in serial input mode
– Power management for reduced power consumption at lower sampling frequencies
– Low power dissipation (30 mW @ fs ≤ 12 kHz, 46 mW @ fs ≤ 24 kHz, 86 mW @ fs > 24 kHz @ 2.7 V)
– Supply voltage range: 1.0 V to 3.6 V due to built-in DC/DC converter (1-cell/2-cell battery operation)
– Adjustable power supply supervision
– Power-off function
– Additional functionality achievable via download software (CELP voice DECODER, ADPCM encoder /DECODER)

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