DESCRIPTION The DAC3154/DAC3164 are dual channel 10-/12-bit, pin-compatible family of 500 MSPS Digital-to-Analog Converters (DAC). The DAC3154/DAC3164 use a 10- /12-bit wide LVDS digital bus with an input FIFO. FIFO input and output pointers can be synchronized across multiple devices for precise signal synchronization. The DAC outputs are current sourcing and terminate to GND with a compliance range of –0.5 to 1V. DAC3154/ DAC3164 are pin compatible with the dual-channel, 14-bit, 500 MSPS Digital-to-Analog Converters DAC3174, and the Single channel, 14-/12-10-bit, Digital-to-Analog Converters DAC3171/DAC3161/DAC3151.
FEATURES • Dual Channel • Resolution – DAC3154: 10-Bit – DAC3164: 12-Bit • Maximum Sample Rate: 500 MSPS • Pin Compatible Family with DAC3174 and DAC3151/DAC3161/DAC3171 • Input Interface: – 12-/10-Bit Wide LVDS Inputs – Internal FIFO • Chip to Chip Synchronization • Power Dissipation: 460mW • Spectral Performance at 20 MHz IF – SNR: 62 dBFS for DAC3154, 72 dBFS for DAC3164 – SFDR: 76 dBc for DAC3154, 77 dBc for DAC3164 • Current Sourcing DACs • Compliance Range: –0.5V to 1V • Package: 64 Pin QFN (9x9mm)
APPLICATIONS • Multi-Carrier, Multi-Mode Cellular Infrastructure Base Stations • Radar • Signal Intelligence • Software-Defined Radio • Test and Measurement Instrumentation
The AD9694 is a quad, 14-bit, 500 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed for sampling wide bandwidth analog signals of up to 1.4 GHz. The AD9694 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.
JESD204B (Subclass 1) coded serial digital outputs Lane rates up to 15 Gbps
1.66 W total power at 500 MSPS
415 mW per analog-to-digital converter (ADC) channel
SFDR = 82 dBFS at 305 MHz (1.80 V p-p input range)
SNR = 66.8 dBFS at 305 MHz (1.80 V p-p input range)
Noise density = −151.5 dBFS/Hz (1.80 V p-p input range)
0.975 V, 1.8 V, and 2.5 V dc supply operation
No missing codes
Internal ADC voltage reference
Analog input buffer
On-chip dithering to improve small signal linearity
Flexible differential input range 1.44 V p-p to 2.16 V p-p (1.80 V p-p nominal)
1.4 GHz analog input full power bandwidth
Amplitude detect bits for efficient AGC implementation
4 integrated wideband digital processors 48-bit NCO, up to 4 cascaded half-band filters
Differential clock input
Integer clock divide by 1, 2, 4, or 8
On-chip temperature diode
Flexible JESD204B lane configurations
The AD9684 is a dual, 14-bit, 500 MSPS ADC. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed for sampling wide bandwidth analog signals. The AD9684 is optimized for wide input bandwidth, a high sampling rate, excellent linearity, and low power in a small package.
PRODUCT DESCRIPTION The AD9765 is a dual port, high speed, two channel, 12-bit CMOS DAC. It integrates two high quality 12-bit TxDAC+ cores, a voltage reference and digital interface circuitry into a small 48-lead LQFP package. The AD9765 offers exceptional ac and dc performance while supporting update rates up to 125 MSPS.
FEATURES 12-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 MHz Output: 75 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation Power Dissipation: 380 mW @ 5 V Power-Down Mode: 50 mW @ 5 V 48-Lead LQFP
APPLICATIONS Communications Base Stations Digital Synthesis Quadrature Modulation
GENERAL DESCRIPTION The AD9704/AD9705/AD9706/AD9707 are the fourth-generation family in the TxDAC series of high performance, CMOS digital-toanalog Converters (DACs). This pin-compatible, 8-/10-/12-/14-bit resolution family is optimized for low power operation, while maintaining excellent dynamic performance. The AD9704/ AD9705/AD9706/AD9707 family is pin-compatible with the AD9748/AD9740/AD9742/AD9744 family of TxDAC Converters and is specifically optimized for the transmit signal path of communication systems.
FEATURES 175 MSPS update rate Low power member of pin-compatible TxDAC product family Low power dissipation 12 mW at 80 MSPS, 1.8 V 50 mW at 175 MSPS, 3.3 V Wide supply voltage: 1.7 V to 3.6 V SFDR to Nyquist AD9707: 84 dBc at 5 MHz output AD9707: 83 dBc at 10 MHz output AD9707: 75 dBc at 20 MHz output Adjustable full-scale current outputs: 1 mA to 5 mA On-chip 1.0 V reference CMOS-compatible digital interface Common-mode output: adjustable 0 V to 1.2 V Power-down mode <2 mW at 3.3 V (SPI controllable) Self-calibration Compact 32-lead LFCSP, RoHS compliant package
The TDA8776 is a 10-bit Digital-to-Analog Converter (DAC) for high resolution video and other high frequency
applications. It converts the digital input signal into an analog output voltage at a maximum conversion rate of
500 MSPS. No external reference voltage is required and all digital inputs are 10K/100K-ECL compatible.
• 10-bit resolution
• Conversion rate up to 500 MHz
• 10K/100K ECL input levels
• Internal reference voltage generator
• No deglitching circuit required
• Internal input register
• Power dissipation only 925 mW (typical)
• Internal 50Ωoutput load (connected to the analog ground)
• Very few external components required.
High-speed Digital-to-Analog conversion for:
• High resolution video and graphics
• Direct Digital Synthesis (DDS)
• High-speed modems.
The AD9741/AD9743/AD9745/AD9746/AD9747 are pin compatible, high dynamic range, dual Digital-to-Analog Converters (DACs) with 8-/10-/12-/ 14-/16-bit resolutions and sample rates of up to 250 MSPS. The devices include specific features for direct conversion transmit applications, including gain and offset compensation, and they interface seamlessly with analog quadrature modulators, such as the ADL5370.
High dynamic range, dual DACs
Low noise and intermodulation distortion
Single carrier WCDMA ACLR = 80 dBc @ 61.44 MHz IF
Innovative switching output stage permits useable outputs
beyond Nyquist frequency
LVCMOS inputs with dual-port or optional interleaved
Differential analog current outputs are programmable from
8.6 mA to 31.7 mA full scale
Auxiliary 10-bit current DACs with source/sink capability for
external offset nulling
Internal 1.2 V precision reference voltage source
Operates from 1.8 V and 3.3 V supplies
315 mW power dissipation
Small footprint, Pb-free, 72-Lead LFCSP
GENERAL DESCRIPTION The AD9714/AD9715/AD9716/AD9717 are pin-compatible, dual, 8-/10-/12-/14-bit, low power Digital-to-Analog Converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC® Converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.
FEATURES Power dissipation @ 3.3 V, 2 mA output 37 mW @ 10 MSPS 86 mW @ 125 MSPS Sleep mode: <3 mW @ 3.3 V Supply voltage: 1.8 V to 3.3 V SFDR to Nyquist 84 dBc @ 1 MHz output 75 dBc @ 10 MHz output AD9717 NSD @ 1 MHz output, 125 MSPS, 2 mA: −151 dBc/Hz Differential current outputs: 1 mA to 4 mA 2 on-chip auxiliary DACs CMOS inputs with Single-port operation Output common mode: adjustable 0 V to 1.2 V Small footprint 40-lead LFCSP RoHS-compliant package
APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators
PRODUCT DESCRIPTION The AD6644 is a high-speed, high-performance, monolithic 14-bit analog-to-digital converter. All necessary functions, including track-and-hold (T/H) and reference, are included onchip to provide a complete conversion solution. The AD6644 provides CMOS-compatible digital outputs. It is the third generation in a wideband ADC family, preceded by the AD9042 (12-bit 41 MSPS) and the AD6640 (12-bit 65 MSPS, IF sampling.)
FEATURES 65 MSPS Guaranteed Sample Rate 40 MSPS Version Available Sampling Jitter < 300 fs 100 dB Multitone SFDR 1.3 W Power Dissipation Differential Analog Inputs Digital Outputs Two’s Complement Format 3.3 V CMOS-Compatible Data Ready for Output Latching
APPLICATIONS Multichannel, Multimode Receivers AMPS, IS-136, CDMA, GSM, Third Generation Single Channel Digital Receivers Antenna Array Processing Communications Instrumentation Radar, Infrared Imaging Instrumentation