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Part Name(s) : CHJ-9921 CHJ9921
ETC
Unspecified
Description : Receiver Module CHJ9921

Brand: Chen Jie CHJ

Model: CHJ-9921

power input :3-5 (V)
Scope: wireless remote control switch, wireless security, wireless Receiver, remote alarm, car alarm, wireless switch, wireless remote areas. Video Input: a variety of learning code wireless remote fixed code can use some rolling code Receiver Module. Stable performance.

Specifications: 315/433M other frequencies can be customized.
 

Power: 0.15 (w) distance adjustment switch :200-3000 meters can, by remote control transmit power to define. Transmission Cable: Wireless transmission .200-3000 meters between
 

Size :30-14 (mm) Type: Wireless Remote Control

Description : 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

DEVICE OVERVIEW
This document contains device specific information for the following devices:

• PIC18F248
• PIC18F258
• PIC18F448
• PIC18F458

These devices are available in 28-pin, 40-pin and 44-pin packages. They are differentiated from each other in four ways:

1. PIC18FX58 devices have twice the Flash program memory and data RAM of PIC18FX48 devices (32 Kbytes and 1536 bytes vs. 16 Kbytes and 768 bytes, respectively).
2. PIC18F2X8 devices implement 5 A/D channels, as opposed to 8 for PIC18F4X8 devices.
3. PIC18F2X8 devices implement 3 I/O ports, while PIC18F4X8 devices implement 5.
4. Only PIC18F4X8 devices implement the Enhanced CCP Module, analog comparators and the  Parallel Slave Port.

All other features for devices in the PIC18FXX8 family, including the serial communications Modules, are identical. These are summarized in Table 1-1. Block diagrams of the PIC18F2X8 and PIC18F4X8 devices are provided in Figure 1-1 and Figure 1-2, respectively. The pinouts for these device families are listed in Table 1-2.

High-Performance RISC CPU:
• Linear program memory addressing up to 2 Mbytes
• Linear data memory addressing to 4 Kbytes
• Up to 10 MIPS operation
• DC – 40 MHz clock input
• 4 MHz-10 MHz oscillator/clock input with PLL active
• 16-bit wide instructions, 8-bit wide data path
• Priority levels for interrupts
• 8 x 8 Single-Cycle Hardware Multiplier

Peripheral Features:
• High current sink/source 25 mA/25 mA
• Three external interrupt pins
• Timer0 Module: 8-bit/16-bit timer/counter with 8-bit programmable prescaler
• Timer1 Module: 16-bit timer/counter
• Timer2 Module: 8-bit timer/counter with 8-bit period register (time base for PWM)
• Timer3 Module: 16-bit timer/counter
• Secondary oscillator clock option – Timer1/Timer3
• Capture/Compare/PWM (CCP) Modules; CCP pins can be configured as:
- Capture input: 16-bit, max resolution 6.25 ns
- Compare: 16-bit, max resolution 100 ns (TCY)
- PWM output: PWM resolution is 1 to 10-bit
  Max. PWM freq. @:8-bit resolution = 156 kHz
                   10-bit resolution = 39 kHz
• Enhanced CCP Module which has all the features of the standard CCP Module, but also has the following features for advanced motor control:
- 1, 2 or 4 PWM outputs
- Selectable PWM polarity
- Programmable PWM dead time
• Master Synchronous Serial Port (MSSP) with two modes of operation:
- 3-wire SPI™ (Supports all 4 SPI modes)
- I2C™ Master and Slave mode
• Addressable USART Module:
- Supports interrupt-on-address bit

Advanced Analog Features:
• 10-bit, up to 8-channel Analog-to-Digital Converter Module (A/D) with:
- Conversion available during Sleep
- Up to 8 channels available
• Analog Comparator Module:
- Programmable input and output multiplexing
• Comparator Voltage Reference Module
• Programmable Low-Voltage Detection (LVD) Module:
- Supports interrupt-on-Low-Voltage Detection
• Programmable Brown-out Reset (BOR) CAN bus Module Features:
• Complies with ISO CAN Conformance Test
• Message bit rates up to 1 Mbps
• Conforms to CAN 2.0B Active Spec with:
- 29-bit Identifier Fields
- 8-byte message length
- 3 Transmit Message Buffers with prioritization
- 2 Receive Message Buffers
- 6 full, 29-bit Acceptance Filters
- Prioritization of Acceptance Filters
- Multiple Receive Buffers for High Priority
  Messages to prevent loss due to overflow
- Advanced Error Management Features

Special Microcontroller Features:
• Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC oscillator
• Programmable code protection
• Power-saving Sleep mode
• Selectable oscillator options, including:
- 4x Phase Lock Loop (PLL) of primary oscillator
- Secondary Oscillator (32 kHz) clock input
• In-Circuit Serial ProgrammingTM (ICSPTM) via two pins

Flash Technology:
• Low-power, high-speed Enhanced Flash technology
• Fully static design
• Wide operating voltage range (2.0V to 5.5V)
• Industrial and Extended temperature ranges

Description : 8M × 72-Bit EDO- DRAM Module (ECC - Module) 168 pin buffered DIMM Module

8M × 72-Bit EDO- DRAM Module (ECC - Module) 168 pin buffered DIMM Module

The HYM 72V8025/35GS-50/-60 is a 64 MByte DRAM Module organized as 8 388 608 words by 72-bit in a 168-pin, dual read-out, single-in-line package comprising nine HYB3165805AJ/AT 8M × 8 DRAMs in 400 mil wide SOJ or TSOPII - packages mounted together with ceramic decoupling capacitors on a PC board. All inputs except RAS and DQ are buffered by using BiCMOS buffers/line drivers.
Each HYB3165805AJ/AT is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to Module assembly. After assembly onto the board, a further set of electrical tests is performed.
The density and speed of the Module can be detected by the use of presence detect pins.

• 168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications
• 1 bank 8 M x 72 organisation
• Optimized for ECC applications
• Hyper Page Mode - EDO Operation
• Performance:

• Single + 3.3V ± 0.3 V supply
• CAS-before-RAS refresh, RAS-only refresh
• Decoupling capacitors mounted on substrate
• All inputs, outputs and clock fully LVTTL & LVCMOS compatible
• 4 Byte interleave enabled, Dual Address inputs (A0/B0)
• Buffered inputs excepts RAS and DQ
• Parallel Presence Detects
• Utilizes nine 8M × 8 -DRAMs and BiCMOS buffers/line drivers VT244A
• Two versions: HYM 72V8035GS with SOJ-components ( 9 mm Module thickness)
                         HYM 72V8025GS with TSOPII-components ( 4 mm Module thickness)
• 4048 refresh cycles / 64 ms with 12 / 11 addressing
• Gold contact pad
• Double sided Module with 25.35 mm (1000 mil) height

Description : 8M × 72-Bit EDO- DRAM Module (ECC - Module)

8M × 72-Bit EDO- DRAM Module (ECC - Module) 168 pin buffered DIMM Module

The HYM 72V8025/35GS-50/-60 is a 64 MByte DRAM Module organized as 8 388 608 words by 72-bit in a 168-pin, dual read-out, single-in-line package comprising nine HYB3165805AJ/AT 8M × 8 DRAMs in 400 mil wide SOJ or TSOPII - packages mounted together with ceramic decoupling capacitors on a PC board. All inputs except RAS and DQ are buffered by using BiCMOS buffers/line drivers.
Each HYB3165805AJ/AT is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to Module assembly. After assembly onto the board, a further set of electrical tests is performed.
The density and speed of the Module can be detected by the use of presence detect pins.

• 168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications
• 1 bank 8 M x 72 organisation
• Optimized for ECC applications
• Hyper Page Mode - EDO Operation
• Performance:

• Single + 3.3V ± 0.3 V supply
• CAS-before-RAS refresh, RAS-only refresh
• Decoupling capacitors mounted on substrate
• All inputs, outputs and clock fully LVTTL & LVCMOS compatible
• 4 Byte interleave enabled, Dual Address inputs (A0/B0)
• Buffered inputs excepts RAS and DQ
• Parallel Presence Detects
• Utilizes nine 8M × 8 -DRAMs and BiCMOS buffers/line drivers VT244A
• Two versions: HYM 72V8035GS with SOJ-components ( 9 mm Module thickness)
                         HYM 72V8025GS with TSOPII-components ( 4 mm Module thickness)
• 4048 refresh cycles / 64 ms with 12 / 11 addressing
• Gold contact pad
• Double sided Module with 25.35 mm (1000 mil) height

Description : High-Performance Microcontrollers with CAN Module

High-Performance Microcontrollers with CAN Module

High Performance RISC CPU:
• C-compiler optimized architecture instruction set
• Linear program memory addressing to 32 Kbytes
• Linear data memory addressing to 4 Kbytes
• Up to 10 MIPS operation:
    - DC - 40 MHz clock input
    - 4 MHz - 10 MHz osc./clock input with PLL active
• 16-bit wide instructions, 8-bit wide data path
• Priority levels for interrupts
• 8 x 8 Single Cycle Hardware Multiplier

Peripheral Features:
• High current sink/source 25 mA/25 mA
• Up to 76 I/O with individual direction control
• Four external interrupt pins
• Timer0 Module: 8-bit/16-bit timer/counter with 8-bit programmable prescaler
• Timer1 Module: 16-bit timer/counter
• Timer2 Module: 8-bit timer/counter with 8-bit period register (time base for PWM)
• Timer3 Module: 16-bit timer/counter
• Secondary oscillator clock option - Timer1/Timer3
• Two Capture/Compare/PWM (CCP) Modules CCP pins can be configured as:
    - Capture input: 16-bit, max resolution 6.25 ns
    - Compare is 16-bit, max resolution 100 ns (TCY)
    - PWM output: PWM resolution is 1- to 10-bit. Max. PWM freq. @:8-bit resolution = 156 kHz 10-bit resolution = 39 kHz
• Master Synchronous Serial Port (MSSP) with two modes of operation:
    - 3-wire SPI™ (Supports all 4 SPI modes)
    - I2C™ Master and Slave mode
• Addressable USART Module: Supports Interrupt on Address bit

Advanced Analog Features:
• 10-bit Analog-to-Digital Converter Module (A/D) with:
    - Fast sampling rate
    - Conversion available during SLEEP
    - DNL = ±1 LSb, INL = ±1 LSb
    - Up to 16 channels available
• Analog Comparator Module:
    - 2 Comparators
    - Programmable input and output multiplexing
• Comparator Voltage Reference Module
• Programmable Low Voltage Detection (LVD) Module
    - Supports interrupt on low voltage detection
• Programmable Brown-out Reset (BOR)

CAN BUS Module Features:
• Message bit rates up to 1 Mbps
• Conforms to CAN 2.0B ACTIVE Spec with:
    - 29-bit Identifier Fields
    - 8 byte message length
• 3 Transmit Message Buffers with prioritization
• 2 Receive Message Buffers
• 6 full 29-bit Acceptance Filters
• Prioritization of Acceptance Filters
• Multiple Receive Buffers for High Priority Messages to prevent loss due to overflow
• Advanced Error Management Features

Special Microcontroller Features:
• Power-on Reset (POR), Power-up Timer (PWRT), and Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC oscillator
• Programmable code protection
• Power saving SLEEP mode
• Selectable oscillator options, including:
    - 4X Phase Lock Loop (of primary oscillator)
    - Secondary Oscillator (32 kHz) clock input
• In-Circuit Serial Programming (ICSP™) via two pins

CMOS Technology:
• Low power, high speed EPROM technology
• Fully static design
• Wide operating voltage range (2.5V to 5.5V)
• Industrial and Extended temperature ranges
• Low power consumption

Description : Receiver Module

PL-IRM0101- 3 Receiver Module
PL-IRM0204-A538 Receiver Module
PL-IRM0206-A538 Receiver Module
PL-IRM0208-A538 Receiver Module
L-31ROPT1XX 3.0mm PHOTOTRANSISTOR
L-32XOPT1XX 3.0mm PHOTOTRANSISTOR
L-51ROPT1XX 5.0mm PHOTOTRANSISTOR
L-SB1R9PD1XX PHOTODIODE
L-SC1R9PD1XX PHOTODIODE
L-31XXIR1XX 3.0mm INFRARED EMITTING DIODE
L-32XXIRXX 3.0mm INFRARED EMITTING DIODE
L-51XXIR1C 5.0mm INFRARED EMITTING DIODE
L-51XXIR1BC 5.0mm INFRARED EMITTING DIODE
 

Description : Receiver Module

PL-IRM0101- 3 Receiver Module
PL-IRM0204-A538 Receiver Module
PL-IRM0206-A538 Receiver Module
PL-IRM0208-A538 Receiver Module
L-31ROPT1XX 3.0mm PHOTOTRANSISTOR
L-32XOPT1XX 3.0mm PHOTOTRANSISTOR
L-51ROPT1XX 5.0mm PHOTOTRANSISTOR
L-SB1R9PD1XX PHOTODIODE
L-SC1R9PD1XX PHOTODIODE
L-31XXIR1XX 3.0mm INFRARED EMITTING DIODE
L-32XXIRXX 3.0mm INFRARED EMITTING DIODE
L-51XXIR1C 5.0mm INFRARED EMITTING DIODE
L-51XXIR1BC 5.0mm INFRARED EMITTING DIODE
 

Description : Dual universal asynchronous Receiver/transmitter (DUART)

DESCRIPTION
The SC26C92 is a pin and function replacement for the SCC2692 and SCN2681 with added features and deeper FIFOs. Its configuration on power up is that of the 2692. Its differences from the 2692 are: 8 character Receiver, 8 character transmit FIFOs, watch dog timer for each Receiver, mode register 0 is added, extended baud rate and overall faster speeds, programmable Receiver and transmitter interrupts. (The SCC2692 is not being discontinued.)

FEATURES
• Dual full-duplex independent asynchronous Receiver/transmitters
• 8 character FIFOs for each Receiver and transmitter
• Programmable data format
    – 5 to 8 data bits plus parity
    – Odd, even, no parity or force parity
    – 1, 1.5 or 2 stop bits programmable in 1/16-bit increments
• 16-bit programmable Counter/Timer
• Programmable baud rate for each Receiver and transmitter selectable from:
    – 27 fixed rates: 50 to 230.4k baud
    – Other baud rates to 230.4k baud at 16X
    – Programmable user-defined rates derived from a programmable counter/timer
    – External 1X or 16X clock
• Parity, framing, and overrun error detection
• False start bit detection
• Line break detection and generation
• Programmable channel mode
    – Normal (full-duplex)
    – Automatic echo
    – Local loopback
    – Remote loopback
    – Multidrop mode (also called ‘wake-up’ or ‘9-bit’)
• Multi-function 7-bit input port
    – Can serve as clock, modem, or control inputs
    – Change of state detection on four inputs
    – Inputs have typically >100k pull-up resistors
• Multi-function 8-bit output port
    – Individual bit set/reset capability
    – Outputs can be programmed to be status/interrupt signals
    – FIFO states for DMA and modem interface
• Versatile interrupt system
    – Single interrupt output with eight maskable interrupting conditions
    – Output port can be configured to provide a total of up to six separate wire-ORable interrupt outputs
    – Each FIFO can be programmed for four different interrupt levels
    – Watch dog timer for each Receiver
• Maximum data transfer rates: 1X – 1Mb/sec, 16X – 1Mb/sec
• Automatic wake-up mode for multidrop applications
• Start-end break interrupt/status
• Detects break which originates in the middle of a character
• On-chip crystal oscillator
• Power down mode
Receiver timeout mode
• Single +5V power supply
• Powers up to emulate SCC2692

Philips
Philips Electronics
Description : 3.3V–5.0V Universal Asynchronous Receiver/Transmitter (UART)

DESCRIPTION
The SC28L91 is a new member of the IMPACT family of Serial Communications Controllers. It is a single channel UART operating at 3.3 and 5.0 volts Vcc, 8 or 16 byte FIFOs and is quite compatible with software of the SC28L92 and previous UARTs offered by Philips. It is a new part that is similar to our previous one channel part but is vastly improved. The improvements being: 16 character Receiver, 16 character transmit FIFOs, watch dog timer for the Receiver, mode register 0 is added, extended baud rate, over all faster bus and data speeds, programmable Receiver and transmitter interrupts and versatile I/O structure. (The previous one channel part, SCC2691, is NOT being discontinued.)

FEATURES
• Member of IMPACT family: 3.3 to 5.0 volt , –40°C to +85°C and 68K for 80xxx bus interface for all devices.
• A full-duplex independent asynchronous Receiver/transmitter
• 16 character FIFOs for each Receiver and transmitter
• Pin programming selects 68K or 80xxx-bus interface
• Programmable data format
    – 5 to 8 data bits plus parity
    – Odd, even, no parity or force parity
    – – 1, 1.5 or 2 stop bits programmable in 1/16-bit increments
• 16-bit programmable Counter/Timer
• Programmable baud rate for each Receiver and transmitter selectable from:
    – 28 fixed rates: 50 to 230.4 k baud
    – Other baud rates to 1 MHz at 16X
    – Programmable user-defined rates derived from a programmable counter/timer
    – External 1X or 16X clock
• Parity, framing, and overrun error detection
• False start bit detection
• Line break detection and generation
• Programmable channel mode
    – Normal (full-duplex)
    – Automatic echo
    – Local loop back
    – Remote loop back
    – Multi-drop mode (also called ‘wake-up’ or ‘9-bit’)
• Multi-function 7-bit input port (includes IACKN)
    – Can serve as clock or control inputs
    – Change of state detection on four inputs
    – Inputs have typically >100k pull-up resistors
    – Change of state detectors for modem control
• Multi-function 8-bit output port
    – Individual bit set/reset capability
    – Outputs can be programmed to be status/interrupt signals
    – FIFO status for DMA interface
• Versatile interrupt system
    – Single interrupt output with eight maskable interrupting conditions
    – Output port can be configured to provide a total of up to six separate interrupt outputs that may be wire ORed.
    – Each FIFO can be programmed for four different interrupt levels
    – Watch dog timer for the Receiver
• Maximum data transfer rates: 1X – 1Mb/sec, 16X – 1Mb/sec
• Automatic wake-up mode for multi-drop applications
• Start-end break interrupt/status with mid-character break detect.
• On-chip crystal oscillator
• Power down mode
Receiver time-out mode
• Single +3.3V or +5V power supply

Part Name(s) : SCC2681T SCC2681TC1A44
Philips
Philips Electronics
Description : Dual asynchronous Receiver/transmitter (DUART)

DESCRIPTION
The Philips Semiconductors SCC2681 Dual Universal Asynchronous Receiver/Transmitter (DUART) is a single-chip MOS-LSI communications device that provides two independent full-duplex asynchronous Receiver/transmitter channels in a single package. The SCC2681T features a faster bus cycle time than the standard SCC2681. The quick bus cycle eliminates or reduces the need for wait states with fast CPUs and permits high throughput in I/O intensive systems. Higher external clock rates may be used with the transmitter, Receiver and counter timer which in turn provide greater versatility in baud rate generation. The SCC2681T interfaces directly with microprocessors and may be used in a polled or interrupt driven system. It is manufactured in CMOS technology.

FEATURES
• Fast bus cycle times reduce or eliminate CPU wait states
• Dual full-duplex asynchronous Receiver/transmitters
• Quadruple buffered Receiver data registers
• Programmable data format
    – 5 to 8 data bits plus parity
    – Odd, even, no parity or force parity
    – 1, 1.5 or 2 stop bits programmable in 1/16-bit increments
• 16-bit programmable Counter/Timer
• Programmable baud rate for each Receiver and transmitter selectable from:
    – 22 fixed rates: 50 to 115.2 k baud
    – Non-standard rates to 115.2
    – Non-standard user-defined rate derived from programmable counter/timer
    – External 1× or 16× clock
• Parity, framing, and overrun error detection
• False start bit detection
• Line break detection and generation
• Programmable channel mode
    – Normal (full-duplex)
    – Automatic echo
    – Local loopback
    – Remote loopback
• Multi-function programmable 16-bit counter/timer
• Multi-function 7-bit input port
    – Can serve as clock or control inputs
    – Change of state detection on four inputs
    – 100 kΩ typical pull-up resistors
• Multi-function 8-bit output port
    – Individual bit set/reset capability
    – Outputs can be programmed to be status/interrupt/DMA signals
    – Auto 485 turn-around
• Versatile interrupt system
    – Single interrupt output with eight maskable interrupting conditions
    – Output port can be configured to provide a total of up to six separate wire-ORable interrupt outputs
• Maximum data transfer rates:
    – 1× – 1 MB/sec transmitter and Receiver
    – 16× – 500 kB/sec Receiver and 250 kB/sec transmitter
• Automatic wake-up mode for multidrop applications
• Start-end break interrupt/status
• Detects break which originates in the middle of a character
• On-chip crystal oscillator
• Single +5 V power supply
• Commercial temperature range

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