datasheetbank_Logo     Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

P/N + Description + Content Search

Search Words :

Part Name(s) : DAC3484 DAC3484IRKDR DAC3484IRKDT DAC3484IZAY DAC3484IZAYR DAC3484I Texas-Instruments
Texas Instruments
Description : QUAD-CHANNEL, 16-BIT, 1.25 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) View

Description
The DAC3484 is a very low power, high dynamic range, QUAD-CHANNEL, 16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC) with a sample rate as high as 1.25 GSPS.

Features
• Very Low Power: 1.27 W at 1.25 GSPS, Full Operating Conditions
• Multi-DAC Synchronization
• Selectable 2x, 4x, 8x, 16x Interpolation Filter
    – Stop-Band Attenuation > 90 dBc
• Flexible On-chip Complex Mixing
    – Two Independent Fine Mixers with 32-Bit NCOs
    – Power Saving Coarse Mixers: ± n×Fs/8
• High Performance, Low Jitter Clock Multiplying PLL
• Digital I and Q Correction
    – Gain, Phase, Offset, and Group Delay Correction
• Digital Inverse Sinc Filter
• Flexible 16-BIT LVDS Input Data Bus
    – 8 Sample Input FIFO
    – Data Pattern Checker
    – Parity Check
    – GC5330 Compatible
• Temperature Sensor
• Differential Scalable Output: 10 mA to 30 mA
• Multiple Package Options: 88-Pin 9x9mm WQFN and 196-Ball 12mmx12mm NFBGA (GREEN / Pb-Free)

Applications
• Cellular Base Stations
• Diversity Transmit
• Wideband Communications

Part Name(s) : DAC3484 DAC3484IRKD25 DAC3484IRKDR DAC3484IRKDT DAC3484IZAY DAC3484IZAYR DAC3484I TI
Texas Instruments
Description : QUAD-CHANNEL, 16-BIT, 1.25 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) View

Description
The DAC3484 is a very low power, high dynamic range, QUAD-CHANNEL, 16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC) with a sample rate as high as 1.25 GSPS.

Features
• Very Low Power: 1.27 W at 1.25 GSPS, Full Operating Conditions
• Multi-DAC Synchronization
• Selectable 2x, 4x, 8x, 16x Interpolation Filter
    – Stop-Band Attenuation > 90 dBc
• Flexible On-chip Complex Mixing
    – Two Independent Fine Mixers with 32-Bit NCOs
    – Power Saving Coarse Mixers: ± n×Fs/8
• High Performance, Low Jitter Clock Multiplying PLL
• Digital I and Q Correction
    – Gain, Phase, Offset, and Group Delay Correction
• Digital Inverse Sinc Filter
• Flexible 16-BIT LVDS Input Data Bus
    – 8 Sample Input FIFO
    – Data Pattern Checker
    – Parity Check
    – GC5330 Compatible
• Temperature Sensor
• Differential Scalable Output: 10 mA to 30 mA
• Multiple Package Options: 88-Pin 9x9mm WQFN and 196-Ball 12mmx12mm NFBGA (GREEN / Pb-Free)

Applications
• Cellular Base Stations
• Diversity Transmit
• Wideband Communications

Part Name(s) : DAC34SH84 DAC34SH84IZAY DAC34SH84IZAYR XDAC34SH84IZAY TI
Texas Instruments
Description : QUAD-CHANNEL, 16-BIT, 1.5 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) View

DESCRIPTION
The DAC34SH84 is a very low-power, high-dynamic range, QUAD-CHANNEL, 16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC) with a sample rate as high as 1.5 GSPS.
The device includes features that simplify the design of complex transmit architectures: 2× to 16× digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement. A high-performance
low-jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic
range. The digital quadrature modulator correction (QMC) enables complete IQ compensation for gain,
offset and phase between channels in direct upconversion applications.

FEATURES
• Low Power: 1.8 W at 1.5 GSPS, Full Operating Condition
• Multi-DAC Synchronization
• Selectable 2×, 4×, 8×, 16× Interpolation Filter
   – Stop-Band Attenuation > 90 dBc
• Flexible On-Chip Complex Mixing
   – Two Independent Fine Mixers With 32-Bit NCOs
   – Power-Saving Coarse Mixers: ±n × fS / 8
• High-Performance, Low-Jitter Clock-Multiplying PLL
• Digital I and Q Correction
   – Gain, Phase and Offset
• Digital Inverse Sinc Filters
• 32-Bit DDR Flexible LVDS Input Data Bus
   – 8-Sample Input FIFO
   – Supports Data Rates up to 750 MSPS
   – Data Pattern Checker
   – Parity Check
• Temperature Sensor
• Differential Scalable Output: 10 mA to 30 mA
• 196-Ball, 12-mm × 12-mm BGA

APPLICATIONS
• Cellular Base Stations
• Diversity Transmit
• Wideband Communications

Part Name(s) : DAC34H84 DAC34H84I DAC34H84IZAY DAC34H84IZAYR PDAC34H84IZAY TI
Texas Instruments
Description : QUAD-CHANNEL, 16-BIT, 1.25 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) View

Description
The DAC34H84 is a very low power, high dynamic range, QUAD-CHANNEL, 16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC) with a sample rate as high as 1.25 GSPS.
The device includes features that simplify the design of complex transmit architectures: 2x to 16x digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement.

Features
• Very Low Power: 1.4 W at 1.25 GSPS
• Multi-DAC Synchronization
• Selectable 2x, 4x, 8x, 16x Interpolation Filter
   – Stop-Band Attenuation > 90 dBc
• Flexible On-chip Complex Mixing
   – Two Independent Fine Mixers with 32-bit NCOs
   – Power Saving Coarse Mixers: ± n×Fs/8
• High Performance, Low Jitter Clock Multiplying PLL
• Digital I and Q Correction
   – Gain, Phase, Offset, and Group Delay Correction
• Digital Inverse Sinc Filters
• 32-Bit DDR Flexible LVDS Input Data Bus
   – 8 Sample Input FIFO
   – Supports Data Rates up to 625 MSPS
   – Data Pattern Checker
   – Parity Check
• Temperature Sensor
• Differential Scalable Output: 10mA to 30mA
• 196-Ball, 12x12mm NFBGA (GREEN / Pb-Free)

Applications
• Cellular Base Stations
• Diversity Transmit
• Wideband Communications


Part Name(s) : DAC5682 DAC5682Z DAC5682ZIRGC25 DAC5682ZIRGCR DAC5682ZIRGCRG4 DAC5682ZIRGCT DAC5682ZIRGCTG4 TI
Texas Instruments
Description : 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) View

DESCRIPTION
The DAC5682Z is a dual-channel 16-BIT 1.0 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) with wideband LVDS data input, integrated 2x/4x interpolation filters, on-board clock multiplier and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk and PLL phase noise performance.

FEATURES
16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC)
• 1.0 GSPS Update Rate
16-BIT Wideband Input LVDS Data Bus
   – 8 Sample Input FIFO
   – Interleaved I/Q data for Dual-DAC Mode
• High Performance
   – 73 dBc ACLR WCDMA TM1 at 180 MHz
• 2x-32x Clock Multiplying PLL/VCO
• 2x or 4x Interpolation Filters
   – Stopband Transition 0.4–0.6 Fdata
   – Filters Configurable in Either Low-Pass or High-Pass Mode
      – Allows Selection of Higher Order Image
• Fs/4 Coarse Mixer
• On Chip 1.2 V Reference
• Differential Scalable Output: 2 to 20 mA
• Package: 64-Pin 9 × 9 mm QFN

APPLICATIONS
• Cellular Base Stations
• Broadband Wireless Access (BWA)
• WiMAX 802.16
• Fixed Wireless Backhaul
• Cable Modem Termination System (CMTS)

Part Name(s) : DAC34SH84 DAC34SH84I DAC34SH84IZAY DAC34SH84IZAYR Texas-Instruments
Texas Instruments
Description : QUAD-CHANNEL, 16-BIT, 1.5 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) View

Description
The DAC34SH84 is a very low-power, high-dynamic range, QUAD-CHANNEL, 16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC) with a sample rate as high as 1.5 GSPS.
The device includes features that simplify the design of complex transmit architectures: 2× to 16× digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement.
A high-performance low-jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital quadrature modulator correction (QMC) enables complete IQ compensation for gain, offset and phase between channels in direct upconversion applications.
Digital data is input to the device through a 32-bit wide LVDS data bus with on-chip termination. The wide bus allows the processing of high-bandwidth signals. The device includes a FIFO, data pattern checker, and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.
The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a 196-ball, 12-mm × 12-mm, 0.8-mm pitch NFBGA package.
The DAC34SH84 low-power, high-bandwidth support, superior crosstalk, high dynamic range, and features are an ideal fit for next-generation communication systems.

Features
• Low Power: 1.8 W at 1.5 GSPS, Full Operating
   Condition
• Multi-DAC Synchronization
• Selectable 2×, 4×, 8×, 16× Interpolation Filter
   – Stop-Band Attenuation > 90 dBc
• Flexible On-Chip Complex Mixing
   – Two Independent Fine Mixers With 32-Bit
      NCOs
   – Power-Saving Coarse Mixers: ±n × fS / 8
• High-Performance, Low-Jitter Clock-Multiplying
   PLL
• Digital I and Q Correction
   – Gain, Phase and Offset
• Digital Inverse Sinc Filters
• 32-Bit DDR Flexible LVDS Input Data Bus
   – 8-Sample Input FIFO
   – Supports Data Rates up to 750 MSPS
   – Data Pattern Checker
   – Parity Check
• Temperature Sensor
• Differential Scalable Output: 10 mA to 30 mA
• 196-Ball, 12-mm × 12-mm NFBGA

Applications
• Cellular Base Stations
• Diversity Transmit
• Wideband Communications

Part Name(s) : DAC34H84 DAC34H84I DAC34H84IZAY DAC34H84IZAYR Texas-Instruments
Texas Instruments
Description : QUAD-CHANNEL, 16-BIT, 1.25 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) View

Description
The DAC34H84 is a very low power, high dynamic range, QUAD-CHANNEL, 16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC) with a sample rate as high as 1.25 GSPS.
The device includes features that simplify the design of complex transmit architectures: 2x to 16x digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement.
A high-performance low jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) enables complete IQ compensation for gain, offset, phase and group delay between channels in direct up-conversion applications.
Digital data is input to the device through a 32-bit wide LVDS data bus with on-chip termination. The wide bus allows the processing of very high bandwidth signals. The device includes a FIFO, data pattern checker and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.
The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a 196-ball, 12x12mm, 0.8mm pitch BGA package.
The DAC34H84 very low power, high bandwidth support, superior crosstalk, high dynamic range and features are an ideal fit for next generation communication systems.

Features
• Very Low Power: 1.4 W at 1.25 GSPS
• Multi-DAC Synchronization
• Selectable 2x, 4x, 8x, 16x Interpolation Filter
   – Stop-Band Attenuation > 90 dBc
• Flexible On-chip Complex Mixing
   – Two Independent Fine Mixers with 32-bit
      NCOs
   – Power Saving Coarse Mixers: ± n×Fs/8
• High Performance, Low Jitter Clock Multiplying
   PLL
• Digital I and Q Correction
   – Gain, Phase, Offset, and Group Delay
      Correction
• Digital Inverse Sinc Filters
• 32-Bit DDR Flexible LVDS Input Data Bus
   – 8 Sample Input FIFO
   – Supports Data Rates up to 625 MSPS
   – Data Pattern Checker
   – Parity Check
• Temperature Sensor
• Differential Scalable Output: 10mA to 30mA
• 196-Ball, 12x12mm NFBGA (GREEN / Pb-Free)

Applications
• Cellular Base Stations
• Diversity Transmit
• Wideband Communications

Part Name(s) : DAC5681Z DAC5681ZIRGCR DAC5681ZIRGCT DAC5681ZI TI
Texas Instruments
Description : 16-BIT, 1.0 GSPS 2x to 4x Interpolating DIGITAL-TO-ANALOG CONVERTER (DAC) View

Description
The DAC5681Z is a 16-BIT 1.0 GSPS DIGITAL-TO-ANALOG CONVERTER (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance

Features
16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC)
• 1.0 GSPS Update Rate
16-BIT Wideband Input LVDS Data Bus
    – 8 Sample Input FIFO
• High Performance
    – 73-dBc ACLR WCDMA TM1 at 180 MHz
• 2x to 32x Clock Multiplying PLL/VCO
• 2x or 4x Interpolation Filters
    – Stopband Transition 0.4–0.6 Fdata
    – Filters Configurable in Either Low-Pass or High-Pass Mode
        – Allows Selection of Higher Order Image
• On-Chip 1.2-V Reference
• 2 to 20-mA Differential Scalable Output
• 64-Pin 9-mm × 9-mm VQFN Package

Applications
• Cellular Base Stations
• Broadband Wireless Access (BWA)
• WiMAX 802.16
• Fixed Wireless Backhaul
• Cable Modem Termination System (CMTS)

Part Name(s) : DAC5682 DAC5682Z DAC5682ZIRGC DAC5682ZIRGCR DAC5682ZIRGCT DAC5682ZI Texas-Instruments
Texas Instruments
Description : 16-BIT, 1.0 GSPS 2x-4x Interpolating Dual-Channel DIGITAL-TO-ANALOG CONVERTER (DAC) View

Description
The DAC5682Z is a dual-channel 16-BIT 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.
The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

Features
16-BIT DIGITAL-TO-ANALOG CONVERTER (DAC)
• 1.0 GSPS Update Rate
16-BIT Wideband Input LVDS Data Bus
   – 8 Sample Input FIFO
   – Interleaved I/Q Data for Dual-DAC Mode
• High Performance
   – 73-dBc ACLR WCDMA TM1 at 180 MHz
• 2x-32x Clock Multiplying PLL/VCO
• 2x or 4x Interpolation Filters
   – Stopband Transition 0.4 to 0.6 Fdata
   – Filters Configurable in Either Low-Pass or
      High-Pass Mode
      – Allows Selection of Higher Order Image
• Fs/4 Coarse Mixer
• On-Chip 1.2-V Reference
• Differential Scalable Output: 2 to 20 mA
• Package: 64-Pin 9-mm × 9-mm QFN

Applications
• Cellular Base Stations
• Broadband Wireless Access (BWA)
• WiMAX 802.16
• Fixed Wireless Backhaul
• Cable Modem Termination System (CMTS)

1

2345678910 Next

All Rights Reserved © datasheetbank.com 2014 - 2020 [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]