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GENERAL DESCRIPTION
The AD9144 is a quad, 16-Bit, high dynamic range Digital-to-Analog Converter (DAC) that provides a maximum sample rate of 2.8 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF6720 analog quadrature modulator (AQM) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a typical range of 13.9 mA to 27.0 mA. The AD9144 is available in an 88-lead LFCSP.

FEATURES
   Supports input data rate >1 GSPS
   Proprietary low spurious and distortion design
      6-carrier GSM IMD = 77 dBc at 75 MHz IF
      SFDR = 82 dBc at dc IF, −9 dBFS
      Flexible 8-lane JESD204B interface
      Support quad or dual DAC mode at 2.8 GSPS
   Multiple chip synchronization
      Fixed latency
      Data generator latency compensation
   Selectable 1×, 2×, 4×, 8× interpolation filter
      Low power architecture
   Input signal power detection
      Emergency stop for downstream analog circuitry protection
   Transmit enable function allows extra power saving
   High performance, low noise phase-locked loop (PLL) clock
      multiplier
   Digital inverse sinc filter
   Low power: 1.6 W at 1.6 GSPS, 1.7 W at 2.0 GSPS,
      full operating conditions
   88-lead LFCSP with exposed pad

APPLICATIONS
   Wireless communications
      3G/4G W-CDMA base stations
      Wideband repeaters
      Software defined radios
   Wideband communications
      Point-to-point
      Local multipoint distribution service (LMDS) and
         multichannel multipoint distribution service (MMDS)
   Transmit diversity, multiple input/multiple output (MIMO)
   Instrumentation
   Automated test equipment

GENERAL DESCRIPTION
The AD9625 is a 12-bit monolithic sampling analog-to-digital Converter (ADC) that operates at conversion rates of up to 2.0 giga samples per second (GSPS). This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9625 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/antijamming measures.

FEATURES
12-bit 2.0 GSPS ADC, no missing codes
SFDR = 80 dBc, AIN up to 1 GHz at −1 dBFS, 2.0 GSPS
SFDR = 76 dBc, AIN up to 1.8 GHz at −1 dBFS, 2.0 GSPS
SNR = 59 dBFS, AIN up to 1 GHz at −1 dBFS, 2.0 GSPS
SNR = 58 dBFS, AIN up to 1.8 GHz at −1 dBFS, 2.0 GSPS
Noise floor = −149.5 dBFS/Hz at 2.0 GSPS
Power consumption: 3.5 W at 2.0 GSPS
Differential analog input: 1.1 V p-p
Differential clock input
High speed 6- or 8-lane JESD204B serial output Subclass 1: 5.0 Gbps at 2.0 GSPS
Two independent decimate by 8 or decimate by 16 filters  with 10-bit NCOs
Supply voltages: 1.3 V, 2.5 V
Serial port control
  Flexible digital output modes
  Built-in selectable digital test patterns

GENERAL DESCRIPTION
The AD9148 is a quad, 16-Bit, high dynamic range, digital-toanalog Converter (DAC) that provides a sample rate of 1000 MSPS. This device includes features optimized for direct conversion transmit applications, including gain, phase, and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators such as the ADL5371/ADL5372/ADL5373/ADL5374/ADL5375.

FEATURES
Single-carrier W-CDMA ACLR = 80 dBc at 150 MHz IF
Channel-to-channel isolation > 90 dB
Analog output
  Adjustable 8.7 mA to 31.7 mA
  RL = 25 Ω to 50 Ω
Novel 2×, 4×, and 8× interpolator eases data interface
On-chip fine complex NCO allows carrier placement anywhere in DAC bandwidth
High performance, low noise PLL clock multiplier
Multiple chip synchronization interface
Programmable digital inverse sinc filter
Auxiliary DACs allow for offset control
Gain DACs allow for I and Q gain matching
Programmable I and Q phase compensation
Digital gain control
Flexible LVDS digital I/F supports 32- or 16-bit bus width
196-ball CSP_BGA, 12 mm × 12 mm

APPLICATIONS
Wireless infrastructure
   LTE, TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM
MIMO/transmit diversity
Digital high or low IF synthesis

GENERAL DESCRIPTION
The AD9154 is a quad, 16-Bit, high dynamic range Digital-to-Analog Converter (DAC) that provides a maximum sample rate of 2.4 GSPS, permitting multicarrier generation up to the Nyquist frequency in baseband mode. The AD9154 includes features optimized for direct conversion transmit applications, including complex digital modulation, input signal power detection, and gain, phase, and offset compensation. The DAC outputs are optimized to interface seamlessly with the ADRF6720-27 radio frequency quadrature modulator (AQM) from Analog Devices, Inc. In mix mode, the AD9154 DAC can reconstruct carriers in the second and third Nyquist zones. A serial port interface (SPI) provides the programming/readback of internal parameters.
The full-scale output current can be programmed over a range of 4 mA to 20 mA. The AD9154 is available in two different 88-lead LFCSP packages.

FEATURES
   Supports input data rates up to 1.096 GSPS
   Proprietary, low spurious and distortion design
      Single carrier LTE 20 MHz bandwidth (BW), ACLR = 77 dBc at
         180 MHz IF
      Six carrier GSM IMD = 78 dBc, 600 kHz carrier spacing at
         180 MHz IF
      SFDR = 72 dBc at 180 MHz IF, −6 dBFS single tone
   Flexible 8-lane JESD204B interface
   Multiple chip synchronization
      Fixed latency
      Data generator latency compensation
   Input signal power detection
   High performance, low noise phase-locked loop (PLL) clock
      multiplier
   Digital inverse sinc filter
   Digital quadrature modulation using a numerically
      controlled oscillator (NCO)
   Nyquist band selection—mix mode
   Selectable 1×, 2×, 4×, and 8× interpolation filters
   Low power: 2.11 W at 1.6 GSPS, full operating conditions
   88-lead, exposed pad LFCSP

APPLICATIONS
   Wireless communications
      Multicarrier LTE and GSM base stations
      Wideband repeaters
      Software defined radios
   Wideband communications
      Point to point microwave radio
   Transmit diversity, multiple input/multiple output (MIMO)
   Instrumentation
   Automated test equipment

GENERAL DESCRIPTION
The AD9912 is a direct digital synthesizer (DDS) that features an integrated 14-bit Digital-to-Analog Converter (DAC). The AD9912 features a 48-bit frequency tuning word (FTW) that can synthesize frequencies in step sizes no larger than 4 μHz. Absolute frequency accuracy can be achieved by adjusting the DAC system clock.The AD9912 also features an integrated system clock phase locked loop (PLL) that allows for system clock inputs as low as 25 MHz.

FEATURES
1 GSPS internal clock speed (up to 400 MHz output directly)
Integrated 1 GSPS 14-bit DAC
48-bit frequency tuning word with 4 μHz resolution
Differential HSTL comparator
Flexible system clock input accepts either crystal or external reference clock
On-chip low noise PLL REFCLK multiplier
2 SpurKiller channels
Low jitter clock doubler for frequencies up to 750 MHz
Single-ended CMOS comparator; frequencies of <150 MHz
Programmable output divider for CMOS output
Serial I/O control
Excellent dynamic performance
Software controlled power-down
Available in two 64-lead LFCSP packages
Residual phase noise @ 250 MHz
  10 Hz offset: −113 dBc/Hz
  1 kHz offset: −133 dBc/Hz
  100 kHz offset: −153 dBc/Hz
  40 MHz offset: −161 dBc/Hz
 
APPLICATIONS
Agile LO frequency synthesis
Low jitter, fine tune clock generation
Test and measurement equipment
Wireless base stations and controllers
Secure communications
Fast frequency hopping 

GENERAL DESCRIPTION
The AD9957 functions as a universal I/Q modulator and agile upConverter for communications systems where cost, size, power consumption, and dynamic performance are critical. The AD9957 integrates a high speed, direct digital synthesizer (DDS), a high performance, high speed, 14-bit Digital-to-Analog Converter (DAC), clock multiplier circuitry, digital filters, and other DSP functions onto a single chip. It provides for baseband upconversion for data transmission in a wired or wireless communications system.
The AD9957 is the third offering in a family of quadrature digital upConverters (QDUCs) that includes the AD9857 and AD9856. It offers performance gains in operating speed, power consumption, and spectral performance. Unlike its predecessors, it supports a 16-bit serial input mode for I/Q baseband data. The device can alternatively be programmed to operate either as a single tone, sinusoidal source or as an interpolating DAC.

FEATURES
  1 GSPS internal clock speed (up to 400 MHz analog output)
  Integrated 1 GSPS 14-bit DAC
  250 MHz I/Q data throughput rate
  Phase noise ≤ −1.5 dBc/Hz (400 MHz carrier @ 1 kHz offset)
  Excellent dynamic performance >80 dB narrow-band SFDR
  8 programmable profiles for shift keying
  SIN(x)/(x) correction (inverse sinc filter)
  Reference clock multiplier
  Internal oscillator for a single crystal operation
  Software and hardware controlled power-down
  Integrated RAM
  Phase modulation capability
  Multichip synchronization
  Easy interface to Blackfin SPORT
  Interpolation factors from 4× to 252×
  Interpolation DAC mode
  Gain control DAC
  Internal divider allows references up to 2 GHz
  1.8 V and 3.3 V power supplies
  100-lead TQFP_EP package

APPLICATIONS
  HFC data, telephony, and video modems
  Wireless base station transmission
  Broadband communications transmissions
  Internet telephony

General description
The DAC1617D1G0 is a high-speed 16-bit dual channel Digital-to-Analog Converter (DAC) with selectable x2, x4 and x8 interpolation filters. The device is optimized for multi-carrier and broadband wireless transmitters at sample rates of up to 1 GSPS. Supplied from a 3.3 V and a 1.8 V source, the DAC1617D1G0 integrates a differential scalable output current up to 34 mA.

Features and benefits
■ Dual-channel 16-bit resolution
■ Synchronization of multiple DAC devices
■ 1 GSPS maximum update rate
■ 3-wire or 4-wire mode SPI interface
■ Selectable x2, x4 and x8 interpolation filters
■ Differential scalable output current from 8.1 mA to 34 mA
■ Very low noise capacitor-free integrated Phase-Locked Loop (PLL)
■ External analog offset control (10-bit auxiliary DACs)
■ Embedded Numerically Controlled Oscillator (NCO) with 40-bit programmable frequency
■ High resolution internal digital gain and offset control to support high performance IQ-modulator image rejection
■ Embedded complex(I/Q) digital IF modulator
■ Internal phase correction
■ 1.8 V and 3.3 V power supplies
■ Inverse (sin x) / x function
■ LVDS DDR compatible input interface with on-chip 100 Ω terminations
■ Power-down mode and Sleep mode; 5-bit NCO low-power mode
■ LVDS DDR input clock up to 370 MHz
■ On-chip 1.25 V reference
■ LVDS or LVPECL compatible DAC clock
■ Industrial temperature range -40 °C to +85 °C
■ Interleaved or folded I and Q data input mode
■ 72 pins small form factor HVQFN package

Applications
■ Wireless infrastructure: LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA
■ Communications: LMDS/MMDS, point-to-point
■ Direct Digital Synthesis (DDS)
■ Broadband wireless systems
■ Digital radio links
■ Instrumentation
■ Automated Test Equipment (ATE)

General description
The DAC1627D1G25 is a high-speed 16-bit dual channel Digital-to-Analog Converter (DAC) with selectable ×2, ×4 and ×8 interpolating filters optimized for multi-carrier and broadband wireless transmitters at sample rates of up to 1.25 GSPS. Supplied from a 3.3 V and a 1.8 V source, the DAC1627D1G25 integrates a differential scalable output current up to 31.8 mA.

Features and benefits
■ Dual-channel 16-bit resolution
■ 1.25 GSPS maximum update rate
■ Selectable x2, x4 and x8 interpolation
   filters
■ Low noise capacitor-free integrated
   Phase-Locked Loop (PLL)
■ Embedded Numerically Controlled
   Oscillator (NCO) with 40-bit
   programmable frequency
■ Embedded complex (I/Q) modulator
■ Two power supplies
■ LVDS DDR compatible input interface
   with on-chip 100 Ω terminations
■ LVDS DDR input clock up to 400 MHz
■ LVDS or LVPECL compatible DAC clock
■ Interleaved or folded I and Q data input
   mode
■ Synchronization of multiple DAC
   devices
■ 3-wire or 4-wire mode SPI interface
■ Differential scalable output current from
   8.1 mA to 34 mA
■ External analog offset control
   (10-bit auxiliary DACs)
■ High resolution internal digital gain and
   offset control to support high
   performance IQ-modulator image
   rejection
■ Internal phase correction
■ Inverse (sin x) / x function
■ Power-down mode and Sleep mode;
   5-bit NCO low-power mode
■ On-chip 1.25 V reference
■ Industrial temperature range -40°C to +85°C
■ 72 pins small form factor HVQFN
   package

Applications
■ Wireless infrastructure: MC_GSM, LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA
■ Communications: LMDS/MMDS, point-to-point
■ Direct Digital Synthesis (DDS)
■ Digital radio links
■ Instrumentation
■ Automated Test Equipment (ATE)

General description
The DAC1627D1G25 is a high-speed 16-bit dual channel Digital-to-Analog Converter (DAC) with selectable ×2, ×4 and ×8 interpolating filters optimized for multi-carrier and broadband wireless transmitters at sample rates of up to 1.25 GSPS. Supplied from a 3.3 V and a 1.8 V source, the DAC1627D1G25 integrates a differential scalable output current up to 31.8 mA.

Features and benefits
■ Dual 16-bit resolution
■ 1.25 GSPS maximum update rate
■ Selectable ×2, ×4 and ×8 interpolation
   filters
■ Very low noise capacitor-free integrated
   Phase-Locked Loop (PLL)
■ Embedded Numerically Controlled
   Oscillator (NCO) with 40-bit
   programmable frequency
■ Embedded complex modulator
■ 1.8 V and 3.3 V power supplies
■ LVDS DDR compatible input interface
   with on-chip 100 Ω terminations
■ LVDS DDR input clock up to 312.5 MHz
■ LVDS or LVPECL compatible DAC clock
■ Interleaved or folded I and Q data input
   mode
■ Synchronization of multiple DAC
   devices
■ 3 or 4 wires mode SPI interface
■ Differential scalable output current from
   6.95 mA to 31.8 mA
■ External analog offset control
   (10-bit auxiliary DACs)
■ High resolution internal digital gain and
   offset control to support high
   performance IQ-modulator image
   rejection
■ Internal phase correction
■ Inverse (sin x) / x function
■ Power-down mode and Sleep mode;
   5-bit NCO low power mode
■ On-chip 1.25 V reference
■ Industrial temperature range −40 °C to
   +85 °C
■ 72 pins small form factor HVQFN
   package

Applications
■ Wireless infrastructure: MG_GSM, LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA
■ Communication: LMDS/MMDS, point-to-point
■ Direct Digital Synthesis (DDS)
■ Broadband wireless systems
■ Digital radio links
■ Instrumentation
■ Automated Test Equipment (ATE)

GENERAL DESCRIPTION
The AD9739 is a 14-bit, 2.5 GSPS high performance RF Digital-to-Analog Converter (DAC) capable of synthesizing wideband signals from dc up to 3.0 GHz. Its DAC core features a quad switch architecture that provides exceptionally low distortion performance with an industry-leading direct RF synthesis capability. This feature enables multicarrier generation up to the Nyquist frequency in baseband mode as well as second and third Nyquist zones in mix mode. The output current can be programmed over the 8.66 mA to 31.66 mA range.

FEATURES
   Direct RF synthesis at 2.5 GSPS update rate
      DC to 1.25 GHz in baseband mode
      1.25 GHz to 3.0 GHz in mix mode
   Industry leading single/multicarrier IF or RF synthesis
      fOUT = 350 MHz, ACLR =80 dBc
      fOUT = 950 MHz, ACLR = 78 dBc
      fOUT = 2100 MHz, ACLR = 69 dBc
   Dual-port LVDS data interface
      Up to 1.25 GSPS operation
      Source synchronous DDR clocking
   Pin-compatible with the AD9739A
   Multichip synchronization capability
   Programmable output current: 8.7 mA to 31.7 mA
   Low power: 1.16 W at 2.5 GSPS

APPLICATIONS
   Broadband communications systems
   Military jammers
   Instrumentation, automatic test equipment
   Radar, avionics