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Description : Octal buffer/line driver with 5-volt tolerant inputs/outputs (3-State)

DESCRIPTION
The 74LVC541A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment.

FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Wide supply voltage range of 2.7V to 3.6V
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
• Direct interface with TTL levels
• 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic

Description : Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-Statetitle

DESCRIPTION
The 74LVC241A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. In 3-State operation, outputs can handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environment.
The 74LVC241A is an octal non-inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OEand 2OE. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times.

FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic.
•Supply voltage range of 1.2 to 3.6 V
•In accordance with JEDEC standard no. 8-1A
•CMOS lower power consumption
•Direct interface with TTL levels
•High impedance when VCC= 0 V

Description : Quad buffer/line driver with 5-volt tolerant inputs/outputs (3-State)

DESCRIPTION
The 74LVC125A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Supply voltage range of 1.2V to 3.6V
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
• Direct interface with TTL levels
• High impedance when VCC = 0V

Description : Octal buffer/line driver with 5-volt tolerant inputs/outputs (3-State)title

DESCRIPTION
The 74LVC244A/74LVCH244A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. These features allow the use of these devices as translators in a mixed 3.3V/5V environment.

FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Supply voltage range of 2.7V to 3.6V
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
• Direct interface with TTL levels
• High impedance when VCC = 0V
• Bushold on all data inputs (74LVCH244A only)

Description : Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-State

DESCRIPTION
The 74LVC126A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. In 3-State operation, outputs can handle 5 V.
The 74LVC126A consists of four non-inverting buffers/line drivers with 3-State outputs (nY) which are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state.

FEATURES
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
• Complies with JEDEC standard no. 8-1A
• ESD protection:
   HBM EIA/JESD22-A114-A exceeds 2000 V
   MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 to +85 °C and −40 to +125 °C.

 

Description : Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-State

General description
The 74LVC240A is an octal inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OEand 2OE. A HIGH on nOEcauses the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

Features and benefits
5 V tolerant inputs for interlacing with 5 V logic
Supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
High-impedance when VCC= 0 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from 40C to +85C and 40C to +125C

Description : 10-bit buffer/line driver with 5-volt tolerant inputs/outputs (3-State)

DESCRIPTION
The 74LVC827A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
   
FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Supply voltage range of 2.7V to 3.6V
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
• Direct interface with TTL levels
• High impedance when VCC = 0V
   

NXP
NXP Semiconductors.
Description : 10-bit buffer/line driver with 5 V tolerant inputs/outputs; 3-State

General description
The 74LVC827A is a 10-bit buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable pins OE1 and OE2. A HIGH on pin OEn causes the outputs to assume a high-impedance OFF-state.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.
   
Features and benefits
■ 5 V tolerant inputs/outputs for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low power consumption
■ Direct interface with TTL levels
■ Complies with JEDEC standard:
    ◆ JESD8-7A (1.65 V to 1.95 V)
    ◆ JESD8-5A (2.3 V to 2.7 V)
    ◆ JESD8-C/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115B exceeds 200 V
    ◆ CDM JESD22-C101E exceeds 1000 V
■ Specified from -40°C to +85°C and -40°C to +125°C
   

NXP
NXP Semiconductors.
Description : 16-bit buffer/line driver with 5V tolerant inputs/outputs; inverting; 3-State

General description
The 74LVC16240A is a 16-bit inverting buffer/line driver with 3-State outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-State outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.

Features and benefits
■ 5 V tolerant inputs/outputs for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low power consumption
■ MULTIBYTE flow-through standard pin-out architecture
■ Low inductance multiple power and ground pins for minimum noise and ground bounce
■ Direct interface with TTL levels
■ Complies with JEDEC standard:
    ◆ JESD8-7A (1.65 V to 1.95 V
    ◆ JESD8-5A (2.3 V to 2.7 V
    ◆ JESD8-C/JESD36 (2.7 V to 3.6 V
■ ESD protection:
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115B exceeds 200 V
    ◆ CDM JESD22-C101E exceeds 1000 V
■ Specified from -40 °C to +85 °C and from -40 °C to +125 °C.

NEXPERIA
Nexperia B.V. All rights reserved
Description : 16-bit buffer/line driver with 5V tolerant inputs/outputs; inverting; 3-State

General description
The 74LVC16240A is a 16-bit inverting buffer/line driver with 3-State outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-State outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.

Features and benefits
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• MULTIBYTE flow-through standard pin-out architecture
• Low inductance multiple power and ground pins for minimum noise and ground bounce
• Direct interface with TTL levels
• Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115B exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C.

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