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INTE-ElectronicGRAL
Integral Corp.
Description : Octal 3-state Noninverting bus transceiver

Octal 3-state Noninverting bus transceiver

These Octal bus transceiver are designed for asynchronous two-way communication between data buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the buses are effectively isolated.

• Bidirectional bus transceiver in a High-Density 20-Pin Package
3-state Outputs Dirve bus Lines Directly
• P-N-P Inputs D-C Loading on bus Lines
• Hysteresis at bus Inputs Improve Noise Margins
• Typical Propagation Delay Times; Port to Port ... 8 ns

System-Logic
System Logic Semiconductor
Description : Octal 3-state Noninverting bus transceiver

Octal 3-state Noninverting bus transceiver

These Octal bus transceiver are designed for asynchronous two way communication between data buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the buses are effectively isolated.

• Bidirectional bus transceiver in a High-Density 20-Pin Package
3-state Outputs Dirve bus Lines Directly
• P-N-P Inputs D-C Loading on bus Lines
• Hysteresis at bus Inputs Improve Noise Margins
• Typical Propagation Delay Times; Port to Port ... 8 ns

SLS
System Logic Semiconductor
Description : Octal 3-state Noninverting bus transceiver

Octal 3-state Noninverting bus transceiver

These Octal bus transceiver are designed for asynchronous twoway communication between data buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the buses are effectively isolated.

 • Bidirectional bus transceiver in a High-Density 20-Pin Package
 • 3-state Outputs Dirve bus Lines Directly
 • P-N-P Inputs D-C Loading on bus Lines
 • Hysteresis at bus Inputs Improve Noise Margins
 • Typical Propagation Delay Times; Port to Port ... 8 ns

Motorola
Motorola => Freescale
Description : Octal bus transceiver WITH 3-state OUTPUT

Octal bus transceiver WITH 3-state OUTPUT

The SN54/74LS623 series is an Octal bus transceiver designed for asynchronous two-way communication between data buses. Control function implementation allows maximum timing flexibility. Enable inputs may be used to disable the device so that buses are effectively isolated. Depending on the Logic Levels at the enable inputs, Data transmission is allowed from the A bus to the B bus or from the B bus to the A bus. The dual-enable configuration gives the LS623 the capability to store data by simultaneous enabling of GBA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled all other data sources to the two sets of bus lines (16 in all) will remain at their last states.

Description : HCT648 Octal bus transceiver/REGISTER (3-state, INV.) HCT646 Octal bus transceiver/REGISTER (3-state)

DESCRIPTION
The M74HCT646/648 are high speed CMOS Octal bus transceiverS AND REGISTERS, (3-state) fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. These devices consist of bus transceiver circuits with 3-state output, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.

■ HIGH SPEED fMAX = 60 MHz (TYP.) AT VCC = 5 V
■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C
■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX)
■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS
■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN.)
■ BALANCED PROPAGATION DELAYS tPLH = tPHL
■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS646/648

Integral
Integral Corp.
Description : Octal 3-state Noninverting bus transceiver

These Octal bus transceiver are designed for asynchronous two-way communication between data buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the buses are effectively isolated.

• Bidirectional bus transceiver in a High-Density 20-Pin Package
3-state Outputs Dirve bus Lines Directly
• P-N-P Inputs D-C Loading on bus Lines
• Hysteresis at bus Inputs Improve Noise Margins
• Typical Propagation Delay Times; Port to Port ... 8 ns

IKSEMICON
IK Semicon Co., Ltd
Description : Octal 3-state Noninverting bus transceiver

These Octal bus transceiver are designed for asynchronous two-way communication between data buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the buses are effectively isolated.

• Bidirectional bus transceiver in a High-Density 20-Pin Package
3-state Outputs Dirve bus Lines Directly
• P-N-P Inputs D-C Loading on bus Lines
• Hysteresis at bus Inputs Improve Noise Margins
• Typical Propagation Delay Times; Port to Port ... 8 ns

Description : HC620 3 STATE INVERTING HC623 3 STATE NON INVERTING Octal bus transceiver

Octal bus transceiver WITH 3 STATE OUTPUTS (NON INVERTING)

DESCRIPTION
The 74HC623 is an advanced high-speed CMOS Octal bus transceiver (3-state) fabricated with silicon gate technology.

■ HIGH SPEED: tPD = 10ns (TYP.) at VCC = 6V
■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN)
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 623

Description : Octal bus transceiver WITH 3-state OUTPUTS (INVERTING AND NONINVERTING)

The MC74F620 is an Octal bus transceiver featuring inverting 3-state bus-compatible outputs in both send and receive directions. The BN outputs are capable of sinking 64 mA and sourcing up to 15 mA, providing very good capacitive drive characteristics. The MC74F623 is a non-inverting version of the MC74F620. These Octal bus transceivers are designed for asynchronous two-way communication between data busses. The control function implementation allows for maximum flexibility in timing.

• High Impedance NPN base inputs for reduced loading (70 µA in High and Low states)
• Ideal for Applications which Require High Output drive and minimal bus loading
Octal Bidirectional bus Interface
3-state Buffer Outputs Sink 64 mA and Source 15 mA
• – F620 Inverting – F623 Noninverting
• ESD Protection > 4000 Volts

Motorola
Motorola => Freescale
Description : Octal bus transceiver, INVERTING WITH 3-state OUTPUTS

The MC74F640 is an Octal transceiver featuring inverting 3-state bus compatible outputs in both transmit and receive directions. The B port outputs are capable of sinking 64 mA and sourcing 15 mA, providing very good capacitive drive characteristics.
   
• High-Impedance NPN Base Inputs for Reduced Loading (70 µA in High and Low States)
• Ideal for Applications which Require High-Output Drive and Minimal bus Loading
• Inverting Version of F245
Octal Bidirectional bus Interface
3-state Buffer Outputs Sink 64 mA and Source 15 mA
• ESD Sensitive — 4000 V HBM
   

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