General Description The VHC574 is an advanced high speed CMOS Octal FlipFlop with 3-STATE output fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type flip-flop is controlled by a clock input (CP) and an output enable input (OE). When the OE input is HIGH, the eight Outputs are in a high impedance state.
Features ■ High Speed: tPD = 5.6 ns (typ) at VCC = 5V ■ High Noise Immunity: VNIH = VNIL = 28% VCC (Min) ■ Power Down Protection is provided on all inputs ■ Low Noise: VOLP = 0.6V (typ) ■ Low Power Dissipation: ICC = 4 µA (Max) @ TA = 25°C ■ Pin and Function Compatible with 74HC574
General Description The 74F374 is a high-speed, low-power Octal D-type FlipFlop featuring separate D-type inputs for each flip-flop and 3-STATE Outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all FlipFlops.
The MC74AC540/74ACT540 and MC74AC541/74ACT541 are Octal buffer/line drivers designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers. The MC74AC541/74ACT541 is a noninverting option of the MC74AC540/74ACT540. These devices are similar in function to the MC74AC240/74ACT240 and MC74AC244/74ACT244 while providing flow-through architecture (inputs on opposite side from Outputs). This pinout arrangement makes these devices especially useful as output ports for microprocessors, allowing ease of layout and greater PC board density.
• 3-State Outputs • Inputs and Outputs Opposite Side of Package, Allowing Easier Interface to Microprocessors • Outputs Source/Sink 24 mA • MC74AC540/74ACT540 Provides Inverted Outputs • MC74AC541/74ACT541 Provides Noninverted Outputs • ′ACT540 and ′ACT541 Have TTL Compatible Inputs
The MC74AC563/74ACT563 is a high-speed Octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The MC74AC563/74ACT563 device is functionally identical to the MC74AC573/74ACT573, but with inverted Outputs.
• Inputs and Outputs on Opposite Sides of Package Allowing Easy Interface with Microprocessors • Useful as Input or Output Port for Microprocessors • Functionally Identical to MC74AC573/74ACT573 but with Inverted Outputs • Outputs Source/Sink 24 mA • ′ACT563 Has TTL Compatible Inputs
This Octal buffer/driver is designed specially to improve both the performance and density of 3-state memory address drivers, clock drivers and bus oriented receivers and transmitters. When this device is used with the ‘ALS241, ‘AS241A, ‘ALS244 and AS244A, the circuit designer has a choice of selected combinations of inverting and noninverting Outputs, symmetrical active-low output-enable (OE) inputs and complementary OE and OE inputs. This device features high fan-out and improved fan-in. The IN74ALS240A is characterized for operation from 0°C to 70°C.
The MC74F620 is an Octal bus transceiver featuring inverting 3-state bus-compatible Outputs in both send and receive directions. The BN Outputs are capable of sinking 64 mA and sourcing up to 15 mA, providing very good capacitive drive characteristics. The MC74F623 is a non-inverting version of the MC74F620. These Octal bus transceivers are designed for asynchronous two-way communication between data busses. The control function implementation allows for maximum flexibility in timing.
• High Impedance NPN base inputs for reduced loading (70 µA in High and Low states) • Ideal for Applications which Require High Output drive and minimal bus loading • Octal Bidirectional Bus Interface • 3-State Buffer Outputs Sink 64 mA and Source 15 mA • – F620 Inverting – F623 Noninverting • ESD Protection > 4000 Volts
Octal Bus Transceivers (non-inverted open-collector Outputs)
This Octal bus transceivers is designed for asynchronous two-way communication between data buses. The devices transmit data, from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated.