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Part Name(s) : STA015 STA015B STA015T ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY

DESCRIPTION
The STA015 is a fully integrated high flexibility MPEG LAYER III AUDIO DECODER, capable of decoding LAYER III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO stand ards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.

APPLICATIONS
PC SOUND CARDS
MULTIMEDIA PLAYERS
VOICE RECORDERS

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Part Name(s) : STA003T ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER

DESCRIPTION
The STA003T is a fully integrated high flexibility MPEG LAYER III AUDIO DECODER, capable of decoding LAYER III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO standards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.

■ SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING:
    - All features specified for LAYER III in ISO/IEC 11172-3 (MPEG 1 AUDIO) except 44.1KHz AUDIO
    - All features specified for LAYER III 2 channels in ISO/IEC13818-3.2 (MPEG 2 AUDIO) except 22.05KHz AUDIO
    - Lower sampling frequencies syntax extension, (not specified by ISO) called MPEG 2.5 except 11.025KHz AUDIO
■ DECODES LAYER III STEREO CHANNELS, DUAL CHANNEL, SINGLE CHANNEL (MONO)
■ SUPPORTING THE MPEG 1 & 2 SAMPLING FREQUENCIES AND THE EXTENSION TO MPEG 2.5: 48, 32, 24, 16, 12, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH DATA RATE FROM 8 Kbit/s UP TO 128 Kbit/s
■ DIGITAL VOLUME CONTROL
■ DIGITAL BASS & TREBLE CONTROL
■ SERIAL BITSTREAM INPUT INTERFACE
■ ANCILLARY DATA EXTRACTION VIA I2C INTERFACE.
■ SERIAL PCM OUTPUT INTERFACE (I2S AND OTHER FORMATS)
■ PLL FOR INTERNAL CLOCK AND FOR OUTPUT PCM CLOCK GENERATION
■ LOW POWER DATA ELABORATION FOR POWER CONSUMPTION OPTIMISATION
■ CRC CHECK AND SYNCHRONISATION ERROR DETECTION WITH SOFTWARE INDICATORS
■ I2C CONTROL BUS
■ LOW POWER 3.3V CMOS TECHNOLOGY
■ 14.72MHz EXTERNAL INPUT CLOCK OR BUILT-IN XTAL OSCILLATOR

APPLICATIONS
■ STARMAN SATELLITE RADIO RECEIVER

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Part Name(s) : STA013 STA013T STA013B ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER

DESCRIPTION
The STA013 is a fully integrated high flexibility MPEG LAYER III AUDIO DECODER, capable of decoding LAYER III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO standards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.
   
■ SINGLE CHIP MPEG2 LAYER 3 DECODER
    SUPPORTING:
    - All features specified for LAYER III in ISO/IEC
        11172-3 (MPEG 1 AUDIO)
    - All features specified for LAYER III in ISO/IEC
        13818-3.2 (MPEG 2 AUDIO)
    - Lower sampling frequencies syntax extension,
        (not specified by ISO) called MPEG 2.5
■ DECODES LAYER III STEREO CHANNELS,
    DUAL CHANNEL, SINGLE CHANNEL
    (MONO)
■ SUPPORTING ALL THE MPEG 1 & 2 SAMPLING
    FREQUENCIES AND THE EXTENSION TO MPEG 2.5:
    48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH
    DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s
■ DIGITAL VOLUME CONTROL
■ DIGITAL BASS & TREBLE CONTROL
■ SERIAL BITSTREAM INPUT INTERFACE
■ ANCILLARY DATA EXTRACTION VIA I2C INTERFACE.
■ SERIAL PCM OUTPUT INTERFACE (I2S
    AND OTHER FORMATS)
    PLL FOR INTERNAL CLOCK AND FOR OUTPUT PCM CLOCK GENERATION
■ LOW POWER CONSUMPTION:
    85mW AT 2.4V
■ CRC CHECK AND SYNCHRONISATION ERROR DETECTION
    WITH SOFTWARE INDICATORS
■ I2C CONTROL BUS
■ LOW POWER 3.3V CMOS TECHNOLOGY
■ 10 MHz, 14.31818 MHz, OR 14.7456 MHz
    EXTERNAL INPUT CLOCK OR BUILT-IN INDUSTRY STANDARD
    XTAL OSCILLATOR DIFFERENT FREQUENCIES MAY BE
    SUPPORTED UPON REQUEST TO STM
   
APPLICATIONS
■ PC SOUND CARDS
■ MULTIMEDIA PLAYERS
   

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Part Name(s) : STA016 STA016A ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER SUPPORTING CD-ROM CAPABILITY

DESCRIPTION
The STA016A is a single chip MPEG 1, 2 and 2.5 LAYER III AUDIO DECODER with embedded CDROM decoding capability. It can be easily connected to most existing CDDSP devices via a software configurable serial link. A tipical application block diagram is show in Figure 1. The AUDIO sources, for instance could be an external flash memory.

FEATURES
■ SINGLE CHIP MPEG LAYER 3 DECODER SUPPORTING:
– All features specified for LAYER III in ISO/IEC 11172-3 (MPEG 1 AUDIO)
– All features specified for LAYER III in ISO/IEC 13818-3.2 (MPEG 2 AUDIO)
– Lower sampling frequencies syntax extension, (not specified by ISO) called MPEG 2.5
■ DECODES LAYER III STEREO CHANNELS, DUAL CHANNEL, SINGLE CHANNEL (MONO)
■ SUPPORTING ALL THE MPEG 1 & 2 SAMPLING FREQUENCIES AND THE EXTENSION TO MPEG 2.5:48, 44.1,32, 24,22.05, 16, 12,11. 025, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH DATA RATE FROM 8 Kbit/s UP TO 320
Kbit/s
■ BYPASS MODE FOR EXTERNAL AUXILIARY AUDIO SOURCE
■ EMBEDDED ISO9660 LAYER FOR FILE SYSTEM DECODING (JOLIET)
■ EMBEDDED CD-ROM DECODER BLOCKS INCLUDING ECC/EDC CAPABILITY
■ FLEXIBLE I2S INPUT INTERFACE FOR EASY CONNECTION WITH MOST CD-SERVO DEVICES
■ EMBEDDED BROWSING COMMAND INTERPRETER FOR EASY FILE-SYSTEM BROWSING
■ CUE-SHEET CAPABILITY UP TO 100 ENTRIES
■ BROWSER COMMAND INTERPRETER (BCI)
– Parent Dir
– Enter Dir
– Previous Entry
– Next Entry
– Get Record Infos
■ EASY PROGRAMMABLE GPSO INTERFACE (MONO/STEREO) FOR ENCODED DATA UP TO 5Mbit/s
■ DIGITAL VOLUME

APPLICATIONS
AUDIO CD PLAYERS
■ MULTIMEDIA PLAYERS
■ CD-ROM PLAYERS
■ CAR RADIO PLAYERS

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Part Name(s) : STA014 STA014B STA014T ST-Microelectronics
STMicroelectronics
Description : MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM AND SRS WOW® POSTPROCESSING CAPABILITY

DESCRIPTION
The STA014 is a fully integrated high flexibility MPEG LAYER III AUDIO DECODER, capable of decoding LAYER III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO standards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5. STA014 receives the input data through a Serial Input Interface. The decoded signal is a stereo, mono, or dual channel digital output that can be sent directly to a D/A converter, by the PCM Output Interface. This interface is software programmable to adapt the STA014 digital output to the most common DACs architectures used on the market. The functional STA014 chip partitioning is described in Fig.1a and Fig.1b.

■ SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING:
   - All features specified for LAYER III in ISO/IEC 11172-3 (MPEG 1 AUDIO)
   - All features specified for LAYER III in ISO/IEC 13818-3.2 (MPEG 2 AUDIO)
   - Lower sampling frequencies syntax extension,
      (not specified by ISO) called MPEG 2.5
■ DECODES LAYER III STEREO CHANNELS, DUAL CHANNEL, SINGLE CHANNEL (MONO)
■ SUPPORTING ALL THE MPEG 1 & 2 SAMPLING FREQUENCIES AND
   THE EXTENSION TO MPEG 2.5: 48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III ELEMENARY COMPRESSED BITSTREAM
   WITH DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s
■ ADPCM CODEC CAPABILITIES:
   - sample frequency from 8 kHz to 32 kHz
   - sample size from 8 bits to 32 bits
   - encoding algorithm: DVI, ITU-G726 pack (G723-24, G721,G723-40)
   - Tone control and fast-forward capability
■ SRS WOW(1) TECHNOLOGY CAN BE USED AS POSTPROCESSING.
   SUPPORT FOR DIFFERENT SPEAKERS TYPES:
   - headphone
   - medium
   - large
■ WOW(1) TRUEBASS AND FOCUS CAN BE INDIPENDENTLY ADJUSTED
■ EASY PROGRAMMABLE GPSO INTERFACE FOR ENCODED
   DATA UP TO 5Mbit/s (TQFP44 & LFBGA 64)
■ DIGITAL VOLUME
■ BASS & TREBLE CONTROL
■ SERIAL BITSTREAM INPUT INTERFACE
■ EASY PROGRAMMABLE ADC INPUT INTERFACE
■ ANCILLARY DATA EXTRACTION VIA I2C INTERFACE.
■ SERIAL PCM OUTPUT INTERFACE (I2S AND OTHER FORMATS)
■ PLL FOR INTERNAL CLOCK AND FOR OUTPUT PCM CLOCK GENERATION
■ CRC CHECK AND SYNCHRONISATION ERROR DETECTION WITH SOFTWARE INDICATORS
■ I2C CONTROL BUS
■ LOW POWER 2.4V CMOS TECHNOLOGY
■ WIDE RANGE OF EXTERNAL CRYSTALS FREQUENCIES SUPPORTED

APPLICATIONS
■ PC SOUND CARDS
■ MULTIMEDIA PLAYERS
■ VOICE RECORDERS

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Part Name(s) : TL7232 TL7232MD Samsung
Samsung
Description : FULL LAYER-III ISO/IEC 11172-3 AUDIO DECODER

FULL LAYER-III ISO/IEC 11172-3 AUDIO DECODER

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Part Name(s) : MAS3509F MAS3519F MAS3529F MAS3539F MAS3549F MAS3559F Micronas
Micronas
Description : MPEG LAYER 2/3, AAC AUDIO DECODER, G.729 Annex A Codec

The MAS 35x9F is a single-chip, low-power MPEG LAYER 2/3 and MPEG2-AAC AUDIO stereo DECODER. It also contains the G.729 Annex A speech compression and decompression technology for use in memory based or broadcast applications. Additional functional ity is achievable via download software (e.g., CELP voice DECODER, Micronas SC4 (ADPCM) encoder/DECODER).

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Part Name(s) : TL7231MD Samsung
Samsung
Description : FULL LAYER-III ISO/IEC 11172-3 AUDIO DECODER

DESCRIPTION
TL7231MD is a single-chip ISO/IEC 11172-3 LAYER III AUDIO DECODER, capable of decoding compressed elementary bit streams as specified in ISO/IEC standard. Since it integrated onchip ADC and on-chip DAC, it can provide you more small and cheaper solution for MP3 pLAYER application. It is designed to be well suited for portable AUDIO appliances.

■ Single-chip ISO/IEC 11172-3 LAYER III AUDIO DECODER
■ Supports All MPEG Bit Rates Including Free Format
■ Supports 32/44.1/48KHz Sampling Frequencies for MPEG Bit Stream
■ Supports Single Channel, Dual Channel, Stereo, and Joint Stereo
■ Any Combination of Intensity Stereo and MS Stereo is supported.
■ Serial Bit Stream Input
■ 8-bit Host Interface Port
■ Digital Volume Control
■ Digital Bass/Treble Control
■ 6-Band Equalizer Function
■ Voice Record/Playback Capability
■ On-chip DAC with 1-bit Sigma Delta Modulation
■ Supports Off-chip DAC Interface
■ On-chip ADC with 12-bit Resolution
■ Power Management to Reduce Power Consumption
■ PLL for Internal Clocks and for Output PCM Clock Generation
■ Single 16.9344MHz External Clock Input
■ 3.0 V Operation
■ Small Footprint 100-pin Thin Quad Flat Package

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Part Name(s) : MAS3507D Micronas
Micronas
Description : MPEG 1/2 LAYER 2/3 AUDIO DECODER

The MAS 3507D is a single-chip MPEG LAYER 2/3 AUDIO DECODER for use in AUDIO broadcast or memory-based playback applications. Due to embedded memories, the embedded DC/DC up-converter, and the very low power consumption, the MAS 3507D is ideally suited for portable electronics.
In MPEG 1 (ISO 11172-3), three hierarchical LAYERs of compression have been standardized. The most sophisticated and complex, LAYER 3, allows compression rates of approximately 12:1 for mono and stereo signals while still maintaining CD AUDIO quality. LAYER 2 (widely used in DVB, ADR, and DAB) achieves a compression of 8:1 providing CD quality.

Features
– Serial asynchronous MPEG bit stream input (SDI)
– Parallel (PIO-DMA) Input
– Broadcast and multimedia operation mode
– Automatic locking to given data rate in broadcast mode
– Data request triggered by ’demand signal’ in multi media mode
– Output AUDIO data delivered (in various formats) via an I2S bus (SDO)
– Digital volume / stereo channel mixer / Bass / Treble
– Output sampling clocks are generated and controlled internally.
– Ancillary data provided via I2C interface
– Status information accessible via PIO pins or I2C
– “CRC Error” and “MPEG Frame Synchronization” Indicators at Pins in serial input mode
– Power management for reduced power consumption at lower sampling frequencies
– Low power dissipation (30 mW @ fs ≤ 12 kHz, 46 mW @ fs ≤ 24 kHz, 86 mW @ fs > 24 kHz @ 2.7 V)
– Supply voltage range: 1.0 V to 3.6 V due to built-in DC/DC converter (1-cell/2-cell battery operation)
– Adjustable power supply supervision
– Power-off function
– Additional functionality achievable via download software (CELP voice DECODER, ADPCM encoder /DECODER)

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Part Name(s) : SAA2520 SAA2520GP Philips
Philips Electronics
Description : Stereo filter and codec for MPEG LAYER 1 AUDIO applications

GENERAL DESCRIPTION
The SAA2520 performs the sub-band filtering and AUDIO frame codec functions to provide efficient AUDIO compression/decompression for MPEG (11172-3) LAYER1 applications. It is capable of functioning as a stand-alone DECODER but requires the addition of an adaptive masking threshold processor (SAA2521) in order to function as a highly efficient encoder.

FEATURES
• Stereo filtering and codec functions in a single chip
MPEG coded interface
• Filtered data interface
• Baseband AUDIO data interface
• LT interface to microcontroller
• Clock generator
• Low operating voltage capability.

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