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ADI
Analog Devices
Description : MIPI/DSI Receiver with HDMI Transmitter

GENERAL DESCRIPTION
The ADV7533 is a multifunction video interface chip. The ADV7533 provides a mobile industry processor interface/display serial interface (MIPI®/DSI) input port, a high definition multimedia interface (HDMI®) data output in a 49-ball wafer level chip scale package (WLCSP). The display serial interface (DSI) input provides up to four lanes of MIPI/DSI data, each running up to 800 Mbps. The DSI Rx implements DSI video mode operation only. The HDMI Tx supports video resolutions using pixel clocks of up to 80 MHz.

Part Name(s) : THC63LVD823
THINE
THine Electronics, Inc.
Description : Single(135MHz)/Dual(170MHz) Link LVDS Transmitter for SXGA/SXGA+/UXGA

General Description
The THC63LVD823 transmitter is designed to support Single Link transmission between Host and Flat Panel Display up to SXGA+ resolutions and Dual Link transmission between Host and Flat Panel Display up to UXGA resolutions.
   
Features
• Wide dot clock range: 25-135MHz suited for VGA,
    SVGA, XGA, SXGA, SXGA+ and UXGA
• PLL requires No external components
• Supports Dual Link, Dual-in (TTL)/Dual-out
    (LVDS) pixel up to 170MHz dot clock for UXGA
• Supports Single Link, Dual-in (TTL)/Single-out
    (LVDS) pixel up to 135MHz dot clock for SXGA+
• Supports Single Link, Single-in (TTL)/Single-out
    (LVDS) pixel up to 85MHz dot clock for XGA
• Clock edge selectable
• Supports Reduced swing LVDS for Low EMI
• Power down mode
• Low power single 3.3V CMOS design
• 100pin TQFP
• THC63LVDM83R compatible
   

Freescale
Freescale Semiconductor
Description : Two-Channel Distributed System Interface (DSI) Physical Interface Device

The 33790 is a Dual Channel physical layer interface IC for the Distributed System Interface (DSI) bus. It is designed to meet automotive requirements. It can also be used in non automotive applications. It supports bidirectional communication between slave and master ICs. Some slave devices derive a regulated 5.0 V from the bus, which can be used to power sensors, thereby eliminating the need for additional circuitry and wiring.


Features
Two Independent DSI Compatible Buses
Pinout Matched to MC68HC55 (SPI to DSI Logic)
Wave-Shaped Bus Output Voltage
Independent Thermal Shutdown and Current Limit
Return Signalling Current Detection
Internal Logic Input Pull ups and Pull downs
On-Board Charge Pump
2.0 kV ESD Capability
Communications RateUp to 150 kbps
Pb-Free Packaging Designated by Suffix Code EG

Part Name(s) : FIN1049 FIN1049MTCX
ON-Semiconductor
ON Semiconductor
Description : LVDS Dual-Line Driver with Dual-Line Receiver

Description
This Dual driver-receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver accepts LVTTL inputs and translates them to LVDS outputs. The receiver accepts LVDS inputs and translates them to LVTTL outputs. The LVDS levels have a typical differential output swing of 350 mV, which provides for low EMI at ultra-low power dissipation even at high frequencies. The FIN1049 can accept LVPECL inputs for translating from LVPECL to LVDS. The En and Enb inputs are AND-ed together to enable / disable the outputs. The enables are common to all four outputs. A single-line driver and single-line receiver function is also available in the FIN1019.

Features
■ Greater than 400 Mbps Data Rate
■ 3.3 V Power Supply Operation
■ Low Power Dissipation
■ Fail-Safe Protection for Open-Circuit Conditions
■ Meets or Exceeds TIA/EIA-644-A LVDS Standard
■ 16-pin TSSOP Package Saves Space
■ Flow-Through Pinout Simplifies PCB Layout
■ Enable/Disable for all Outputs
■ Industrial Operating Temperature Range: -40°C to +85°C

Description : Mobile AMD G-series Dual Core/Single Core Mini-ITX with CRT/LVDS/HDMI, 6 COM and Dual LAN

[Advantech]

Features
◾ Supports AMD Mobile G-series Dual Core/Single Core processor
◾ One 204-pin SO-DIMM up to 4 GB DDR31066/1333 MHz SDRAM
◾ Supports Dual display with CRT/HDMI/LVDS (eDP)
Dual LANs, 6COM, Mini PCIe, and CFast
◾ Supports SUSIAccess and Embedded Software APIs

Description : Gigabit Multimedia Serial Link Deserializer with LVDS System Interface

General Description
The MAX9268 deserializer utilizes Maxim’s gigabit multimedia serial link (GMSL) technology. The MAX9268 deserializer features an LVDS system interface for reduced pin count and a smaller package, and pairs with any GMSL serializer to form a complete digital serial link for joint transmission of high-speed video, audio, and bidirectional control data.

Features
♦ Pairs with Any GMSL Serializer
♦ 2.5Gbps Payload-Rate AC-Coupled Serial Link
♦ Scrambled 8b/10b Line Coding
♦ Supports WXGA (1280 x 800) with 24-Bit Color
♦ 8.33MHz to 104MHz (3-Channel LVDS) or 6.25MHz to 78MHz (4-Channel LVDS) Output Clock
♦ 4-Bit to 32-Bit Word Length, 8kHz to 192kHz I2S Audio Channel Supports High-Definition Audio
♦ Embedded Half-/Full-Duplex Bidirectional Control Channel (100kbps to 1Mbps)
♦ Two 3-Level Inputs Support 9 Device Addresses
♦ Interrupt Supports touch-Screen Functions for Display Panels
♦ I2C Master for Peripherals
♦ Equalizer for Serial Link Input
♦ Programmable Spread Spectrum on the LVDS and Control Outputs for Reduced EMI
♦ Serial-Data Clock Recovery Eliminates an External Clock
♦ Automatic Data-Rate Detection Allows On-the-Fly Data-Rate Change
♦ Built-In PRBS Generator for BER Testing of the Serial Link
♦ ISO 10605 and IEC 61000-4-2 ESD Protection
♦ -40NC to +105NC Operating Temperature Range
♦ 1.8V to 3.3V I/O and 3.3V Core Supplies
♦ Patent Pending

Applications
    High-Resolution Automotive Navigation
    Rear-Seat Infotainment
    Megapixel Camera Systems

Part Name(s) : A840 TA8400 TA8400P
Toshiba
Toshiba
Description : Dual Bridge DRIVER

Dual Bridge DRIVER

The TA8400PP is Dual Bridge Driver designed especially for VCR cassette and tape loading motor drives

 

Description : 3.3V Dual Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator

The MC100EPT23 is a Dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required. The small outline 8-lead SOIC package and the Dual gate design of the EPT23 makes it ideal for applications which require the translation of a clock or data signal.
The EPT23 is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external VBB reference, the EPT23 does not require both ECL standard versions. The LVPECL/LVDS inputs are differential. Therefore, the MC100EPT23 can accept any standard differential LVPECL/LVDS input referenced from a VCC of +3.3 V.

Features
• 1.5 ns Typical Propagation Delay
• Maximum Operating Frequency > 275 MHz
• LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs
• 24 mA LVTTL Outputs
• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
• Pb−Free Packages are Available

 

Fairchild
Fairchild Semiconductor
Description : LVDS Dual Line Driver with Dual Line Receiver

Description
This Dual driver-receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver accepts LVTTL inputs and translates them to LVDS outputs. The receiver accepts LVDS inputs and translates them to LVTTL outputs. The LVDS levels have a typical differential output swing of 350 mV, which provides for low EMI at ultra-low power dissipation even at high frequencies. The FIN1049 can accept LVPECL inputs for translating from LVPECL to LVDS. The En and Enb inputs are AND-ed together to enable / disable the outputs. The enables are common to all four outputs. A single-line driver and single-line receiver function is also available in the FIN1019.

Features
■ Greater than 400 Mbps Data Rate
■ 3.3 V Power Supply Operation
■ Low Power Dissipation
■ Fail-Safe Protection for Open-Circuit Conditions
■ Meets or Exceeds TIA/EIA-644-A LVDS Standard
■ 16-pin TSSOP Package Saves Space
■ Flow-Through Pinout Simplifies PCB Layout
■ Enable/Disable for all Outputs
■ Industrial Operating Temperature Range: -40°C to +85°C

Description : Two-Channel Distributed System Interface (DSI) Physical Interface Device

The 33790 is a two-Channel physical layer interface IC for the Distributed System Interface (DSI) bus. It is designed to meet automotive requirements. It can also be used in nonautomotive applications. It supports bidirectional communication between slave and masterICs. Some slave devices derive a regulated 5.0 V from the bus, which can be used to power sensors, there by
eliminating the need for additional circuitry and wiring.

Features
• Two Independent DSI Compatible Busses
• Pinout Matched to MC68HC55 (SPI to DSI Logic)
• Wave-Shaped Bus Output Voltage
• Independent Thermal Shutdown and Current Limit
• Return Signalling Current Detection
• Internal Logic Input Pull-Ups and Pull-Downs
• On-Board Charge Pump
• 2.0 kV ESD Capability
• Communications Rate Up to 150 kbps
• Motorola now offers Pb-free packages with sufix code EG

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