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Part Name(s) : ICS9112-18 ICS9112BM-18 ICS9112BM-18T 9112BM-18 ICST
Integrated Circuit Systems
Description : Zero Delay, Low Skew BUFFER

Description
The ICS9112-18 is a low jitter, low-skew, high performance PLL based zero delay BUFFER for high speed applications. Based on ICS’s proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 160 MHz at 3.3 V. The ICS9112-18 includes a bank of four outputs running at 1X, and another four outputs running at 1/2X. In the zero delay mode, the rising edge of the input clock is aligned with the rising edges of all eight outputs. Compared to competitive CMOS devices, the ICS9112-18 has the lowest jitter of all.
ICS manufactures the largest variety of clock generators and BUFFERs, and is the largest clock supplier in the world.

Features
• Packaged in 16 pin narrow SOIC
• Zero input-output delay
• Four 1X outputs plus four half-X outputs
• Output to output skew is less than 250 ps
• Output clocks up to 160 MHz at 3.3 V
• Ability to generate 2X the input
• Full CMOS outputs with 18 mA output drive
   capability at TTL levels at 3.3 V
• Spread Smart™ technology works with spread
   spectrum clock generators
• Advanced, low power, sub-micron CMOS process
• 3.0 to 5.5 V operating voltage

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Part Name(s) : NTE1929 NTE-Electronic
NTE Electronics
Description : 3 Terminal Adjustable Positive Voltage Regulator 1.2V to 33V, 3A

Description:
The NTE1929 is an adjustable 3–terminal positive voltage regulator in a TO220 type package capable of supplying in excess of 3A over an output voltage range of 1.2V to 33V. This device employes internal current limiting, thermal shutdown, and safe area compensation making the it essentially blow–out proof.
The NTE1929 serves a wide variety of applications including local, on card regulation. This device
also makes an especially simple adjustable switching regulator, a programmable output regulator,
and can also be used as a precision current regulator.

Features:
 Guaranteed 3A Output Current
 Output Adjustable Between 1.2V and 33V
 Load Regulation Typically 0.1%
 Line Regulation Typically 0.005%/V
 Internal Thermal Overload Protection
 Internal Short–Circuit Current Limiting Constant with Temperature
 Floating Operation for High Voltage Applications
 Standard 3–Lead TO220 Type Transistor Package
 Eliminates Stocking many Fixed Voltages

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Part Name(s) : 2217-18 2217-25 2217-33 TLV2217 TLV2217-18 TLV2217-18KCS TLV2217-18KCSE3 TLV2217-18KVURG3 TLV2217-25 TLV2217-25KCSE3 TLV2217-25KVURG3 TLV2217-25PWR TLV2217-33 TLV2217-33KCSE3 TLV2217-33KVURG3 TLV2217-33PWR Texas-Instruments
Texas Instruments
Description : Low-Dropout Fixed-Voltage Regulators

Description
The TLV2217 family of low-dropout regulators offers a variety of fixed-voltage options that offer a maximum continuous input voltage of 16 V, making them more versatile than CMOS regulators. Utilizing a PNP pass element, these regulators are capable of sourcing 500 mA of current, with a specified maximum dropout of 500 mV (3.3-V and 2.5-V options), making these regulators ideal for LOWVOLTAGE applications. Additionally, the TLV2217 regulators offer very tight output accuracy of ±2% across operating load and temperature ranges. Other convenient features the regulators provide are internal overcurrent limiting, thermal-overload protection, and overvoltage protection. The TLV2217 family of regulators is available in fixed voltages of 1.8 V, 2.5 V, and 3.3 V.

Features
• Fixed 1.8-V, 2.5-V, and 3.3-V Outputs
• ±1% Maximum Output Voltage Tolerance at TJ = 25°C
• 500-mV Maximum Dropout Voltage at 500 mA (3.3-V Option) • ±2% Output Voltage Variation Across Load and Temperature
• Internal Overcurrent Limiting
• Internal Thermal-Overload Protection
• Internal Overvoltage Protection

Applications
• Electronic Points of Sale
• Medical, Health, and Fitness Applications
• Printers
• Appliances and White Goods
• TV Set-Top Boxes

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Part Name(s) : XU1002 MIMIX
Mimix Broadband
Description : 18.0-25.0 GHz GaAs MMIC Transmitter

General Description
Mimix Broadband’s 18.0-25.0 GHz GaAs MMIC transmitter has a +20.0 dBm output third order intercept and 15.0 dB image rejection across the band. This device is an image reject subharmonic anti-parallel diode mixer followed by a balanced two stage output amplifier and includes an integrated LO BUFFER amplifier. The image reject mixer reduces the need for unwanted sideband filtering before the power amplifier.

Features
• Sub-harmonic Transmitter
• Integrated IR Mixer, LO BUFFER & Output Amplifier
• +20.0 dBm Output Third Order Intercept (OIP3)
• 2.0 dBm LO Drive Level
• 15.0 dB Image Rejection, 10.0 dB Conversion Gain
• 100% On-Wafer RF and DC Testing
• 100% Visual Inspection to MIL-STD-883 Method 2010

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Part Name(s) : BWR-5/3-3.3/4.25-D12A BWR-5/3-3.3/4.25-D12AN BWR-5/3-3.3/4.25-D12AS BWR-5/3-3.3/4.25-D24A BWR-5/3-3.3/4.25-D24AN BWR-5/3-3.3/4.25-D24AS BWR-5/3-3.3/4.25-D48A BWR-5/3-3.3/4.25-D48AN BWR-5/3-3.3/4.25-D48AS Datel
DATEL Data Acquisition products
Description : Dual Output Mixed Voltage, BWR Models5V and 3.3V, Independent Dual Output 30 Watt, DC/DC Converters

DATELs BWR series of DC/DC converters now includes two independent converters in one 2" x 2" package. The BWR-5/3-3.3/4.25 family provides both 5V at 3 Amps and 3.3V at 4.25 Amps for a combined output power of 30 Watts from input ranges of 10V to 18V (-D12A), 18 to 36V (-D24A), or 36 to 75V (-D48A).

Features
■ Independently regulated 5V/3.3V outputs
■ 5V @ 3A/3.3V @ 4.25A simultaneously delivered
■ Independent VOUT Trim pins for margining
■ Independent On/Off Control pins
■ 88% efficiency; 75mV ripple/noise
■ Input ranges: 10-18V, 18-36V or 36-75V
■ UL 1950 and EN60950 safety approvals
■ Fully isolated, 1500Vdc guaranteed
■ Input under and overvoltage shutdown
■ Independent OVP; short circuit protection
■ Thermal shutdown

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Part Name(s) : BWR-5/3-3.3/4.25-D12A BWR-5/3-3.3/4.25-D12A-C BWR-5/3-3.3/4.25-D12A-C-C BWR-5/3-3.3/4.25-D12A-Y BWR-5/3-3.3/4.25-D12A-Y-C BWR-5/3-3.3/4.25-D12AL1 BWR-5/3-3.3/4.25-D12AL1-C BWR-5/3-3.3/4.25-D12AL2 BWR-5/3-3.3/4.25-D12AL2-C BWR-5/3-3.3/4.25-D12AN BWR-5/3-3.3/4.25-D12AN-C BWR-5/3-3.3/4.25-D24A BWR-5/3-3.3/4.25-D24A-C BWR-5/3-3.3/4.25-D24A-C-C BWR-5/3-3.3/4.25-D24A-Y BWR-5/3-3.3/4.25-D24A-Y-C BWR-5/3-3.3/4.25-D24AL1 BWR-5/3-3.3/4.25-D24AL1-C BWR-5/3-3.3/4.25-D24AL2 BWR-5/3-3.3/4.25-D24AL2-C BWR-5/3-3.3/4.25-D24AN BWR-5/3-3.3/4.25-D24AN-C BWR-5/3-3.3/4.25-D48A BWR-5/3-3.3/4.25-D48A-C BWR-5/3-3.3/4.25-D48A-C-C Murata-ps
Murata Power Solutions
Description : Dual Output BWR Models Mixed Voltage, 5V and 3.3V, Independent Dual Output 30 Watt DC/DC Converters

Murata Power Solutions' BWR series of DC/DC converters now includes two independent converters in one 2" x 2" package. The BWR-5/3-3.3/4.25 family provides both 5V at 3 Amps and 3.3V at 4.25 Amps for a combined output power of 30 Watts from input ranges of 10V to 18V (-D12A), 18 to 36V (-D24A), or 36 to 75V (-D48A).

FEATURES
Independently regulated 5V/3.3V outputs
5V @ 3A/3.3V @ 4.25A simultaneously delivered
Independent VOUT Trim pins for margining
Independent On/Off Control pins
88% efficiency; 75mV ripple/noise
Input ranges: 10-18V, 18-36V or 36-75V
UL 1950 and EN60950-1 safety approvals
Fully isolated, 1500Vdc guaranteed
Input under and overvoltage shutdown
Independent OVP; short circuit protection
Thermal shutdown

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Part Name(s) : PCK2001 PCK2001DL Philips
Philips Electronics
Description : 14.318–150 MHz I2C 1:18 clock BUFFER

DESCRIPTION
The PCK2001 is a 1–18 fanout BUFFER used for 133/100 MHz CPU, 66/33 MHz PCI, 14.318 MHz REF, or 133/100/66 MHz SDRAM clock distribution. 18 outputs are typically used to support up to four
SDRAM DIMMS commonly found in desktop, workstation or server applications.
All clock outputs meet Intel’s drive, rise/fall time, accuracy, and skew requirements. An I2C interface is included to allow each output to be enabled/disabled individually. An output disabled via the I2C interface will be held in the LOW state. In addition, there is an OE input which 3-States all outputs.

FEATURES
•HIGH speed, LOW noise non-inverting 1–18 BUFFER
•Typically used to support four SDRAM DIMMs
•Multiple VDD, VSSpins for noise reduction
•3.3 V operation
•Separate 3-State pin for testing
•ESD protection exceeds 2000 V per Standard 801.2
•Optimized for 66 MHz, 100 MHz and 133 MHz operation
•175 ps skew outputs
•Available in 48-pin SSOP package
•See PCK2001M for mobile (reduced pincount) 28-pin 1-10 BUFFER version
•Individual clock output enable/disable via I2C

 

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Part Name(s) : W972GG6JB W972GG6JB-18 W972GG6JB-25 W972GG6JB25I W972GG6JB-3 W972GG6JB-3I W972GG6JB W972GG6JB-18 W972GG6JB-25 W972GG6JB25A W972GG6JB25I W972GG6JB25K W972GG6JB-3 W972GG6JB-3A Winbond
Winbond
Description : 16M x 8 BANKS x 16 BIT DDR2 SDRAM

GENERAL DESCRIPTION
The W972GG6JB is a 2G bits DDR2 SDRAM, organized as 16,777,216 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-1066) for various applications. W972GG6JB is sorted into the following speed grades: -18, -25, 25I, -3 and -3I. The -18 is compliant to the DDR2-1066 (7-7-7) specification. The -25 and 25I grades are compliant to the DDR2-800 (5-5-5) or DDR2-800 (6-6-6) specification (the 25I industrial grade parts is guaranteed to support -40°C ≤ TCASE ≤ 95°C). The -3 and -3I grades are compliant to the DDR2-667 (5-5-5) specification (the -3I industrial grade parts is guaranteed to support -40°C ≤ TCASE ≤ 95°C).

FEATURES
• Power Supply: VDD, VDDQ = 1.8 V ± 0.1 V
• Double Data Rate architecture: two data transfers per clock cycle
• CAS Latency: 3, 4, 5, 6 and 7
• Burst Length: 4 and 8
• Bi-directional, differential data strobes (DQS and DQS ) are transmitted / received with data
• Edge-aligned with Read data and center-aligned with Write data
• DLL aligns DQ and DQS transitions with clock
• Differential clock inputs (CLK and CLK )
• Data masks (DM) for write data
• Commands entered on each positive CLK edge, data and data mask are referenced to both edges of DQS
• Posted CAS programmable additive latency supported to make command and data bus efficiency
• Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
• Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality
• Auto-precharge operation for read and write bursts
• Auto Refresh and Self Refresh modes
• Precharged Power Down and Active Power Down
• Write Data Mask
• Write Latency = Read Latency - 1 (WL = RL - 1)
• Interface: SSTL_18
• Packaged in WBGA 84 Ball (11x13 mm2), using Lead free materials with RoHS compliant

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Part Name(s) : NTE970 NTE-Electronic
NTE Electronics
Description : Linear Integrated Circuit 3–Terminal Adjustable Positive Voltage Regulator 1.2V to 33V, 3A

Description:
The NTE970 is an adjustable 3–terminal positive voltage regulator in a TO3 type package capable of supplying in excess of 3 Amps over a 1.2V to 33V output range.

Features:
Adjustable Output Down to 1.2V
Guaranteed 3A Output Current
Line Regulation Typically 0.005%/V
Load Regulation Typically 0.1%
Thermal Regulation
Current Limit Constant with Temperature

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Part Name(s) : LH540215 LH540225 LH540215U-20 LH540215U-25 LH540215U-35 LH540215M-20 LH540215M-25 LH540215M-35 LH540225U-20 LH540225U-25 LH540225U-35 LH540225M-20 LH540225M-25 LH540225M-35 Sharp
Sharp Electronics
Description : 512 × 18 / 1024 × 18 Synchronous FIFO

FUNCTIONAL DESCRIPTION
NOTE: Throughout this data sheet, a BOLD ITALIC type font is used for all references to Enhanced Operating Mode features which do not function in IDT-Compatible Operating Mode; and also for all references to the retransmit facility (which is not an IDT72215B/25B FIFO feature), even though it may be used – subject to some restrictions – in either of these two operating modes. Thus, readers interested only in using the LH540215/25 FIFOs in IDT-Compatible Operating Mode may skip over BOLD ITALIC sections, if they wish.

FEATURES
• Fast Cycle Times: 20/25/35 ns
• Pin-Compatible Drop-In Replacements for IDT72215B/25B FIFOs
• Choice of IDT-Compatible or Enhanced Operating Mode; Selected by an Input Control Signal
• Device Comes Up into One of Two Known Default States at Reset Depending on the State of the EMODE Control Input: Programming is Allowed, but is not Required
• Internal Memory Array Architecture Based on CMOS Dual-Port SRAM Technology, 512 × 18 or 1024 × 18
• ‘Synchronous’ Enable-Plus-Clock Control at Both Input Port and Output Port
• Independently-Synchronized Operation of Input Port and Output Port
• Control Inputs Sampled on Rising Clock Edge
• Most Control Signals Assertive-LOW for Noise Immunity
• May be Cascaded for Increased Depth, or Paralleled for Increased Width
• Five Status Flags: Full, Almost-Full, Half-Full, Almost-Empty, and Empty; ‘Almost’ Flags are Programmable
• In Enhanced Operating Mode, Almost-Full, Half-Full, and Almost-Empty Flags can be Made Completely Synchronous
• In Enhanced Operating Mode, Duplicate Enables for Interlocked Paralleled FIFO Operation, for 36-Bit Data Width, when Selected and Appropriately Connected
• In Enhanced Operating Mode, Disabling Three-State Outputs May be Made to Suppress Reading
• Data Retransmit Function
• TTL/CMOS-Compatible I/O
• Space-Saving 68-Pin PLCC Package, and 64-Pin TQFP Package

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