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Part Name(s) : 74VCX32244 74VCX32244G 74VCX32244GX Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 32-BIT BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS

General Description
The VCX32244 contains thirty-two non-inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for 8-bit, 16-bit or full 32-BIT operation.
The 74VCX32244 is designed for LOW VOLTAGE (1.2V to 3.6V) VCC applications WITH I/O capability up to 3.6V.
The 74VCX32244 is fabricated WITH an advanced CMOS technology to achieve high speed operation while maintain ing LOW CMOS power dissipation.

Features
■ 1.2V to 3.6V VCC supply operation
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ tPD 2.5 ns max for 3.0V to 3.6V VCC
■ Power-off high impedance INPUTS AND OUTPUTS
■ Supports live insertion AND WITHdrawal (Note 1)
■ Static Drive (IOH/IOL)
   ±24 mA @ 3.0V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V
■ Packages in plastic Fine-Pitch Ball Grid Array (FBGA)

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Part Name(s) : 74LCX32244 74LCX32244G 74LCX32244GX Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 32-BIT BUFFER/LINE DRIVER WITH 5V TOLERANT INPUTS AND OUTPUTS

General Description
The LCX32244 contains thirty-two non-inverting buffers WITH 3-STATE OUTPUTS designed to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for full 32-BIT operation.

Features
■ 5V TOLERANT INPUTS AND OUTPUTS
■ 2.3V–3.6V VCC specifications provided
■ 4.5 ns tPD max (VCC = 3.0V), 20 µA ICC max
■ Power down high impedance INPUTS AND OUTPUTS
■ Supports live insertion/WITHdrawal (Note 1)
■ ±24 mA output drive (VCC = 3.0V)
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V
■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)

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Part Name(s) : 74LCX540CW Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE Octal BUFFER/LINE DRIVER WITH 5V TOLERANT INPUTS AND OUTPUTS

General Description
The LCX540 is an octal BUFFER/LINE DRIVER designed to be employed as a memory AND address DRIVER, clock DRIVER AND bus oriented transmitter/receiver.
   
Features
■ 5V TOLERANT INPUTS AND OUTPUTS
■ 2.3V–3.6V VCC specifications provided
■ 6.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
■ Power down high impedance INPUTS AND OUTPUTS
■ Supports live insertion/WITHdrawal (Note 1)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
    Human body model > 2000V
    Machine model > 200V
   

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Part Name(s) : 74ALVC162244 74ALVC162244GX 74ALVC162244T 74ALVC162244TX 74ALVC162244G Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 16-Bit BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS AND 26Ω Series Resistor in OUTPUTS

General Description
The ALVC162244 contains sixteen non-inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for full 16-bit operation. The 74ALVC162244 is designed for LOW VOLTAGE (1.65V to 3.6V) VCC applications WITH I/O capability up to 3.6V. The 74ALVC162244 is also designed WITH 26Ω series resistors in the OUTPUTS. This design reduces line noise in applications such as memory address DRIVERs, clock DRIVERs, AND bus transceivers/transmitters.

Features
■ 1.65V to 3.6V VCC supply operation
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ 26Ω series resistors in OUTPUTS
■ tPD
   3.8 ns max for 3.0V to 3.6V VCC
   4.3 ns max for 2.3V to 2.7V VCC
   7.6 ns max for 1.65V to 1.95V VCC
■ Power-off high impedance INPUTS AND OUTPUTS
■ Supports live insertion AND WITHdrawal
■ Uses patented noise/EMI reduction circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V
■ Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)

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Part Name(s) : 74ALVC162240 74ALVC162240T 74ALVC162240TX Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 16-Bit Inverting BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS AND 26Ω Series Resistors in OUTPUTS

General Description
The ALVC162240 contains sixteen inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for full 16-bit operation.
The 74ALVC162240 is designed for LOW VOLTAGE (1.65V to 3.6V) VCC applications WITH I/O capability up to 3.6V. The 74ALVC162240 is also designed WITH 26Ω series resistors in the OUTPUTS. This design reduces line noise in applications such as memory address DRIVERs, clock DRIVERs, AND bus transceivers/transmitters.
The 74ALVC162240 is fabricated WITH an advanced CMOS technology to achieve high speed operation while maintaining LOW CMOS power dissipation.

Features
■ 1.65V to 3.6V VCC supply operation
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ 26Ω series resistors in OUTPUTS
■ tPD
   3.8 ns max for 3.0V to 3.6V VCC
   4.3 ns max for 2.3V to 2.7V VCC
   7.6 ns max for 1.65V to 1.95V VCC
■ Power-off high impedance INPUTS AND OUTPUTS
■ Supports live insertion AND WITHdrawal (Note 1)
■ Uses patented noise/EMI reduction circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V

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Part Name(s) : 74VCX16244 74VCX16244G 74VCX16244GX 74VCX16244MTD 74VCX16244MTDX Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 16-Bit BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS

General Description
The VCX16244 contains sixteen non-inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for full 16-bit operation.

FeatuFeatures
■1.2V to 3.6V VCC supply operation
■3.6V TOLERANT INPUTS AND OUTPUTS
■tPD
2.5 ns max for 3.0V to 3.6V VCC
■Power-off high impedance INPUTS AND OUTPUTS
■Supports live insertion AND WITHdrawal (Note 1)
■Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
■Uses patented noise/EMI reduction circuitry
■Latch-up performance exceeds 300 mA
■ESD performance:
Human body model !2000V
Machine model !200V
■Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)

View
Part Name(s) : 74ALVC16244 74ALVC16244GX 74ALVC16244MTD 74ALVC16244MTDX 74VCX16244CW Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 16-Bit BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS

General Description
The ALVC16244 contains sixteen non-inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/ receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for full 16-bit operation.

Features
■1.65V–3.6V VCC supply operation
■3.6V TOLERANT INPUTS AND OUTPUTS
■tPD
3.0 ns max for 3.0V to 3.6V VCC
3.5 ns max for 2.3V to 2.7V VCC
6.0 ns max for 1.65V to 1.95V VCC
■Power-off high impedance INPUTS AND OUTPUTS
■Supports live insertion AND WITHdrawal
■Uses patented noise/EMI reduction circuitry
■Latch-up conforms to JEDEC JED98
■ESD performance:
Human body model !2000V
Machine model !200V
■Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)

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Part Name(s) : 74VCX16240 74VCX16240MTD 74VCX16240MTDX 74VCX16240MEAX 74VCX16240MEA Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 16-Bit Inverting BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS

General Description
The VCX16240 contains sixteen inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for full 16-bit operation.

Features
■ 1.2V to 3.6V VCC supply operation
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ tPD 2.5 ns max for 3.0V to 3.6V VCC
■ Power-off high impedance INPUTS AND OUTPUTS
■ Supports live insertion AND WITHdrawal (Note 1)
■ Static Drive (IOH/IOL) ±24 mA @ 3.0V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
  Human body model ! 2000V
  Machine model ! 200V

View
Part Name(s) : 74ALVC16240 74ALVC16240MTD 74ALVC16240MTDX Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 16-Bit Inverting BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS

General Description
The ALVC16240 contains sixteen inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control INPUTS which can be shorted together for full 16-bit operation.
The 74ALVC16240 is designed for LOW VOLTAGE (1.65V to 3.6V) VCC applications WITH I/O capability up to 3.6V.
The 74ALVC16240 is fabricated WITH an advanced CMOS technology to achieve high speed operation while maintaining LOW CMOS power dissipation.

Features
■ 1.65V to 3.6V VCC supply operation
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ tPD
   3.0 ns max for 3.0V to 3.6V VCC
   3.5 ns max for 2.3V to 2.7V VCC
   6.0 ns max for 1.65V to 1.95V VCC
■ Power-off high impedance INPUTS AND OUTPUTS
■ Supports live insertion AND WITHdrawal (Note 1)
■ Uses patented noise/EMI reduction circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
   Human body model > 2000V
   Machine model > 200V

View
Part Name(s) : 74ALVC162827 74ALVC162827T 74ALVC162827TX Fairchild
Fairchild Semiconductor
Description : LOW VOLTAGE 20-Bit BUFFER/LINE DRIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS AND 26Ω Series Resistors in the OUTPUTS

General Description
The ALVC162827 contains twenty non-inverting buffers WITH 3-STATE OUTPUTS to be employed as a memory AND address DRIVER, clock DRIVER, or bus oriented transmitter/receiver. The device is byte controlled. Each byte has NOR output enables for maximum control flexibility.
   
Features
■ 1.65V to 3.6V VCC supply operation
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ 26Ω series resistors in OUTPUTS
■ tPD
    3.9 ns max for 3.0V to 3.6V VCC
    4.6 ns max for 2.3V to 2.7V VCC
    8.2 ns max for 1.65V to 1.95V VCC
■ Power-off high impedance INPUTS AND OUTPUTS
■ Supports live insertion AND WITHdrawal (Note 1)
■ Uses patented noise/EMI reduction circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
    Human body model > 2000V
    Machine model > 200V
   

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