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Part Name(s) : AZ100LVE111E AZ100LVE111EFN AZ100LVE111EFNR2 AZ10LVE111E AZ10LVE111EFN AZ10LVE111EFNR2 Arizona-Microtek
AZ Microtek
Description : ECL/PECL 1:9 DIFFERENTIAL CLOCK DRIVER WITH ENABLE

DESCRIPTION
The AZ10/100LVE111E is a low skew 1-to-9 DIFFERENTIAL DRIVER, designed WITH CLOCK distribution in mind. The IN signal is fanned-out to nine identical DIFFERENTIAL outputs. An ENABLE input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q¯ outputs HIGH.

FEATURES
• Operating Range of 3.0V to 5.5V
• Low Skew
• Guaranteed Skew Spec
DIFFERENTIAL Design
ENABLE
• VBB Output
• 75kΩ Internal Input Pulldown Resistors
• Direct Replacement for ON Semiconductor MC10E111 & MC100E111

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Part Name(s) : AZ100LVE111E AZ10LVE111E AZ10LVE111EFN AZ100LVE111EFN AZ10LVE111EFNR2 AZ100LVE111EFNR2 AZM
Arizona Microtek, Inc
Description : ECL/PECL 1:9 DIFFERENTIAL CLOCK DRIVER WITH ENABLE

DESCRIPTION
The AZ10/100LVE111E is a low skew 1-to-9 DIFFERENTIAL DRIVER, designed WITH CLOCK distribution in mind. The IN signal is fanned-out to nine identical DIFFERENTIAL outputs. An ENABLE input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q¯ outputs HIGH.

FEATURES
• Operating Range of 3.0V to 5.5V
• Low Skew
• Guaranteed Skew Spec
DIFFERENTIAL Design
ENABLE
• VBB Output
• 75kΩ Internal Input Pulldown Resistors
• Direct Replacement for ON Semiconductor MC10E111 & MC100E111

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Part Name(s) : MC100LVEP14DT MC100LVEP14DTR2 ON-Semiconductor
ON Semiconductor
Description : 2.5V / 3.3V1:5 DIFFERENTIAL ECL/PECL/HSTL CLOCK DRIVER

Description
The MC100LVEP14 is a low skew 1−to−5 DIFFERENTIAL DRIVER, designed WITH CLOCK distribution in mind, accepting two CLOCK sources into an input multiplexer. The ECL/PECL input signals can be either DIFFERENTIAL or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions.
The LVEP14 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew WITHin a device and from device to device.
To ensure that the tight skew specification is realized, both sides of any DIFFERENTIAL output need to be terminated identically into 50 Ω even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) WITHout affecting skew.

Features
• 100 ps Device−to−Device Skew
• 25 ps WITHin Device Skew
• 400 ps Typical Propagation Delay
• Maximum Frequency > 2 GHz Typical
• The 100 Series Contains Temperature Compensation
• PECL and HSTL Mode:
   VCC = 2.375 V to 3.8 V WITH VEE = 0 V
• NECL Mode:
   VCC = 0 V WITH VEE = −2.375 V to −3.8 V
• LVDS Input Compatible
• Open Input Default State
• Pb−Free Packages are Available*

 

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Part Name(s) : MC100LVEP14 MC100LVEP14DTG MC100LVEP14DTR2G ON-Semiconductor
ON Semiconductor
Description : 2.5V / 3.3V 1:5 DIFFERENTIAL ECL/PECL/HSTL CLOCK DRIVER

Description
The MC100LVEP14 is a low skew 1−to−5 DIFFERENTIAL DRIVER, designed WITH CLOCK distribution in mind, accepting two CLOCK sources into an input multiplexer. The ECL/PECL input signals can be either DIFFERENTIAL or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew WITHin a device and from device to device.
To ensure that the tight skew specification is realized, both sides of any DIFFERENTIAL output need to be terminated identically into 50 Ω even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) WITHout affecting skew.

Features
• 100 ps Device−to−Device Skew
• 25 ps WITHin Device Skew
• 400 ps Typical Propagation Delay
• Maximum Frequency > 2 GHz Typical
• The 100 Series Contains Temperature Compensation
• PECL and HSTL Mode:
   VCC = 2.375 V to 3.8 V WITH VEE = 0 V
• NECL Mode:
   VCC = 0 V WITH VEE = −2.375 V to −3.8 V
• LVDS Input Compatible
• Open Input Default State
• These Devices are Pb−Free and are RoHS Compliant

 

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Part Name(s) : NB100LVEP221D ON-Semiconductor
ON Semiconductor
Description : 2.5V/3.3V1:20 DIFFERENTIAL HSTL/ECL/PECL CLOCK DRIVER

The NB100LVEP221 is a low skew 1-to-20 DIFFERENTIAL CLOCK DRIVER, designed WITH CLOCK distribution in mind, accepting two CLOCK sources into an input multiplexer. The two CLOCK inputs are DIFFERENTIAL ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The LVPECL input signals can be either DIFFERENTIAL configuration or single-ended (if the VBB output is used).

• 15 ps Typical Output-to-Output Skew
• 40 ps Typical Device-to- Device Skew
• Jitter Less than 2 ps RMS
• Maximum Frequency > 1.0 GHz Typical
• Thermally Enhanced 52-Lead LQFP
• VBB Output
• 540 ps Typical Propagation Delay
• LVPECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V WITH VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V WITH VEE = -2.375 V to -3.8 V
• Q Output will Default Low WITH Inputs Open or at VEE
• Pin Compatible WITH Motorola MC100EP221

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Part Name(s) : MAX9320B MAX9320BESA MAX9320BEUA MaximIC
Maxim Integrated
Description : 1:2 DIFFERENTIAL PECL/ECL/LVPECL/LVECL CLOCK and Data DRIVER

General Description
The MAX9320B low-skew, 1-to-2 DIFFERENTIAL DRIVER is designed for CLOCK and data distribution. The input is reproduced at two DIFFERENTIAL outputs. The DIFFERENTIAL input can be adapted to accept single-ended inputs by applying an external reference voltage.

Features
♦ Improved Second Source of the MC10EP11D
♦ +3.0V to +5.5V DIFFERENTIAL PECL/LVPECL Operation
♦ -3.0V to -5.5V ECL/LVECL Operation
♦ Low 22mA Supply Current
♦ 20ps Part-to-Part Skew
♦ 6ps Output-to-Output Skew
♦ 208ps Propagation Delay
♦ Minimum 300mV Output at 3GHz
♦ Outputs Low for Open Input
♦ ESD Protection >2kV (Human Body Model)

Applications
    Precision CLOCK Distribution
    Low-Jitter Data Repeater
    Protection Switching

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Part Name(s) : AZ100E111FN AZ100E111FNR2 AZ10E111FN AZ10E111FNR2 AZ10E111 AZ100E111 Arizona-Microtek
AZ Microtek
Description : ECL/PECL 1:9 DIFFERENTIAL CLOCK DRIVER

DESCRIPTION
The AZ10/100E111 is a low skew 1-to-9 DIFFERENTIAL DRIVER, designed WITH CLOCK distribution in mind. The IN signal is fanned-out to nine identical DIFFERENTIAL outputs. An ENABLE input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q¯ outputs HIGH.

FEATURES
• Low Skew
DIFFERENTIAL Design
CLOCK ENABLE
• VBB Output
• Operating Range of 4.2V to 5.46V
• 75kΩ Internal Input Pulldown Resistors
• Direct Replacement for ON Semi MC10E111 & MC100E111

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Part Name(s) : MAX9321B MAX9321BESA MAX9321BEUA MaximIC
Maxim Integrated
Description : DIFFERENTIAL PECL/ECL/LVPECL/LVECL Receiver/DRIVER

General Description
The MAX9321B low-skew DIFFERENTIAL receiver/DRIVER is designed for CLOCK and data distribution. The DIFFERENTIAL input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage.
The MAX9321B features ultra-low propagation delay (172ps) and part-to-part skew (20ps) WITH 24mA maximum supply current, making this device ideal for CLOCK buffering or repeating. For interfacing to DIFFERENTIAL PECL and LVPECL signals, these devices operate over a +3.0V to +5.5V supply range, allowing high-performance CLOCK and data distribution in systems WITH a nominal 3.3V or 5.0V supply. For DIFFERENTIAL ECL and LVECL operation, this device operates from a -3.0V to -5.5V supply.
The MAX9321B is offered in industry-standard 8-pin SO and TSSOP packages.

Features
♦ Improved Second Source of the MC10EP16D
♦ +3.0V to +5.5V DIFFERENTIAL PECL/LVPECL Operation
♦ -3.0V to -5.5V DIFFERENTIAL ECL/LVECL Operation
♦ Low 17mA Supply Current
♦ 20ps Part-to-Part Skew
♦ 172ps Propagation Delay
♦ Minimum 300mV Output at 3GHz
♦ Output Low for Open Input
♦ ESD Protection >2kV (Human Body Model)
♦ On-Chip Reference for Single-Ended Input

Applications
  Precision CLOCK Buffer
  Low-Jitter Data Repeater

 

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Part Name(s) : MC100LVEP111 MC100LVEP111FA MC100LVEP111FAG MC100LVEP111FAR2 MC100LVEP111FARG MC100LVEP111MNG MC100LVEP111MNRG ON-Semiconductor
ON Semiconductor
Description : 2.5V / 3.3V1:10 DIFFERENTIAL ECL/PECL/HSTL CLOCK DRIVER

Description
The MC100LVEP111 is a low skew 1−to−10 DIFFERENTIAL DRIVER, designed WITH CLOCK distribution in mind, accepting two CLOCK sources into an input multiplexer. The PECL input signals can be either DIFFERENTIAL or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under PECL conditions.
The LVEP111 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew WITHin a device and from device to device

Features
• 85 ps Typical Device−to−Device Skew
• 20 ps Typical Output−to−Output Skew
• Jitter Less than 1 ps RMS
• Maximum Frequency > 3 Ghz Typical
• VBB Output
• 430 ps Typical Propagation Delay
• The 100 Series Contains Temperature Compensation
• PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V WITH VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V WITH VEE = −2.375 V to −3.8 V
• Open Input Default State
• LVDS Input Compatible
• Fully Compatible WITH MC100EP111
• Pb−Free Packages are Available

 

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Part Name(s) : MC100EP111 MC100EP111FA Motorola
Motorola => Freescale
Description : LOW–VOLTAGE 1:10 DIFFERENTIAL ECL/PECL CLOCK DRIVER

The MC100EP111 is a low skew 1–to–10 DIFFERENTIAL DRIVER, designed WITH CLOCK distribution in mind. It accepts two CLOCK sources into an input multiplexer. The input signals can be either DIFFERENTIAL or single–ended if the VBB output is used. The selected signal is fanned out to 10 identical DIFFERENTIAL outputs.

• 100ps Part–to–Part Skew
• 35ps Output–to–Output Skew
DIFFERENTIAL Design
• VBB Output
• Voltage and Temperature Compensated Outputs
• Low Voltage VEE Range of –2.375 to –3.8V
• 75kΩ Input Pulldown Resistors

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