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Part Name(s) : TC4017 TC4017BF TC4017BP Toshiba
Toshiba
Description : TC4017BP/TC4017BF Decade Counter/Divider

TC4017BP/BF is decimal Johnson counter consisting of 5 stage D-type flip-flop equipped with the decoder to convert the output to decimal. Depending on the number of count pulses fed to CLOCK or CLOCK INHIBIT one output among 10 output lines “Q0” through “Q9” becomes “H” level. The counter advances its state at rising edge of CLOCK (CLOCK INHIBIT = “L”) or falling edge of CLOCK INHIBIT (CLOCK = “H”). RESET input to “H” level resets the counter to Q0 = “H” and Q1 through Q9 = “L” regardless of CLOCK and CLOCK INHIBIT

Part Name(s) : XRK7988 Exar
Exar Corporation
Description : INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

GENERAL DESCRIPTION
The XRK7988 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate the input signals frequency and phase while the other three pairs generate 8x, phase aligned clock outputs. External PLL feedback is used to also provide zero delay buffer performance.

FEATURES
• Fully Integrated PLL
• Intelligent Dynamic Clock Switch
• LVPECL Clock Outputs
• LVCMOS Control I/O
• 3.3V Operation
• 32-Lead LQFP Packaging
• 19.44 to 155.52 MHz

Part Name(s) : XRK79892 XRK79892IQ Exar
Exar Corporation
Description : INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

GENERAL DESCRIPTION
The XRK79892 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate the input signals frequency and phase while the other
three pairs generate 4x, phase aligned clock outputs. External PLL feedback is used to also provide zero
delay buffer performance.

FEATURES
• Fully Integrated PLL
• Intelligent Dynamic Clock Switch
• LVPECL Clock Outputs
• LVCMOS Control I/O
• 3.3V Operation
• 32-Lead LQFP Packagin
• Pin compatible with MPC9892i

Part Name(s) : IDT2305 IDT2305-1DC IDT2305-1DCG IDT2305-1DCGI IDT2305-1DCI IDT2305-1HDC IDT2305-1HDCI IDT2305-1PGG IDT2305-1PGGI IDT
Integrated Device Technology
Description : 3.3V ZERO DELAY CLOCK BUFFER

The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

Part Name(s) : MPC9449 MPC9449 MPC9449_16 IDT
Integrated Device Technology
Description : 3.3 V/2.5 V 1:15 PECL/LVCMOS Clock Fanout Buffer

The MPC9449 is a 3.3 V or 2.5 V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications.

Features
• 15 LVCMOS compatible clock outputs
• Two selectable LVCMOS and one differential LVPECL compatible clock inputs
• Selectable output frequency divider (divide-by-one and divide-by-two)
• Maximum clock frequency of 200 MHz
• Maximum clock skew of 200 ps
• High-impedance output control
• 3.3 V or 2.5 V power supply
• Drives up to 30 series terminated clock lines
• Ambient temperature range –40C to +85C
• 52-lead LQFP packaging, Pb-free
• Supports clock distribution in networking, telecommunication
   and computing applications
• Pin and function compatible to MPC949

Part Name(s) : MPC9893 MPC9893AE IDT
Integrated Device Technology
Description : 3.3V 1:12 LVCMOS PLL Clock Generator

The MPC9893 is a 2.5 V and 3.3 V compatible, PLL based intelligent dynamic clock switch and generator specifically designed for redundant clock distribution systems. The device receives two LVCMOS clock signals and generates 12 phase aligned output clocks. The MPC9893 is able to detect a failing reference clock signal and to dynamically switch to a redundant clock signal. The switch from the failing clock to the redundant clock occurs without interruption of the output clock signal (output clock slews to alignment). The phase bump typically caused by a clock failure is eliminated.

Features
• 12-output LVCMOS PLL clock generator
• 2.5 V and 3.3 V compatible
• IDCS - on-chip intelligent dynamic clock switch
• Automatically detects clock failure
• Smooth output phase transition during clock failover switch
• 7.5 – 200 MHz output frequency range
• LVCMOS compatible inputs and outputs
• External feedback enables zero-delay configurations
• Supports networking, telecommunications and computer applications
• Output enable/disable and static test mode (PLL bypass)
• Low skew characteristics: maximum 50 ps output-to-output (within bank)
• 48-lead LQFP package, Pb-free
• Ambient operating temperature range of -40 to 85C
• For functional replacement use 87973

Part Name(s) : MPC9893 MPC9893FA Motorola
Motorola => Freescale
Description : Low Voltage PLL Intelligent Dynamic Clock (IDCS) Switch

The MPC9893 is a 2.5V and 3.3V compatible, PLL based intelligent dynamic clock switch and generator specifically designed for redundant clock distribution systems. The device receives two LVCMOS clock signals and generates 12 phase aligned output clocks. The MPC9893 is able to detect a failing reference clock signal and to dynamically switch to a redundant clock signal. The switch from the failing clock to the redundant clock occurs without interruption of the output clock signal (output clock slews to alignment). The phase bump typically caused by a clock failure is eliminated.

Features
• 12 output LVCMOS PLL clock generator
• 2.5V and 3.3V compatible
• IDCS - on-chip intelligent dynamic clock switch
• Automatically detects clock failure
• Smooth output phase transition during clock failover switch
• 7.5 - 200 MHz output frequency range
• LVCMOS compatible inputs and outputs
• External feedback enables zero-delay configurations
• Supports networking, telecommunications and computer applications
• Output enable/disable and static test mode (PLL bypass)
• Low skew characteristics: maximum 50 ps output-to-output (within bank)
• 48 lead LQFP package
• Ambient operating temperature range of --40 to 85°C

Part Name(s) : MPC9449 Motorola
Motorola => Freescale
Description : 3.3V/2.5V 1:15 PECL/LVCMOS Clock Fanout Buffer

The MPC9449 is a 3.3V or 2.5V compatible, 1:15 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 200 MHz and output skews less than 200 ps the device meets the needs of the most demanding clock applications.

Features
• 15 LVCMOS compatible clock outputs
• Two selectable LVCMOS and one differential LVPECL compatible clock inputs
• Selectable output frequency divider (divide-by-one and divide-by-two)
• Maximum clock frequency of 200 MHz
• Maximum clock skew of 200 ps
• High-impedance output control
• 3.3V or 2.5V power supply
• Drives up to 30 series terminated clock lines
• Ambient temperature range –40°C to +85°C
• 52 lead LQFP packaging
• Supports clock distribution in networking, telecommunication and
   computing applications
• Pin and function compatible to MPC949

Part Name(s) : VSC8175 Vitesse
Vitesse Semiconductor
Description : 9.9-10.7Gb/s 16:1 Multiplexer and Clock Generator with High-speed Clock Outpu
Part Name(s) : CDC1104 CDC1104RVKR TI
Texas Instruments
Description : 1 to 4 Configurable Clock Buffer for 3D Displays

DESCRIPTION
The CDC1104 is a 1 to 4 configurable clock buffer. The device accepts an input reference clock and creates 4 buffered output clocks with an output frequency equal to one half the input clock frequency. Four control inputs, S1, S2, S3, S4 configurable phases of the clock outputs.

FEATURES
• Input Reference Clock 120Hz–240Hz
• Output Clock (Fin/2) 60Hz–120Hz
• Output Buffer Drive Strength: 8mA
• 4 Clock Outputs
• 4 Control Pins Select Phases of Clock Outputs
• Supply Voltage: 3.8V–5.5V
• Operating Temperature Range: –40°C to 85°C
• ESD Protection Exceeds JESD 22
   – 2000-V Human-Body Model (A114-B)
   – 500-V Charged-Device Model (C101)
• Package Offerings
   – 12-pin QFN (3mm x 3mm)

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