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Part Name(s) : TLC2574 TLC2574IDW TLC2574IDWG4 TLC2574IN TLC2574IPW TLC2574IPWG4 TLC2578 TLC2578IDW TLC2578IDWG4 TLC2578IPW TLC2578IPWG4 TLC2578IPWR TLC2578IPWRG4 TLC3574 TLC3574IDW TLC3574IDWG4 TLC3574IDWR TLC3574IDWRG4 TLC3574IN TLC3574IPW TLC3574IPWG4 TLC3578 TLC3578IDW TLC3578IDWG4 TLC3578IDWR TI
Texas Instruments
Description : 5-V ANALOG, 3-/5-V DIGITAL, 14-/12-BIT, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WIRH ±10-V INPUTS

description
The TLC3574, TLC3578, TLC2574, and TLC2578 are a family of high-performance, low-power, CMOS ANALOG-to-DIGITAL CONVERTERS (ADC). TLC3574/78 is a 14-bit ADC; TLC2574/78 is a 12-bit ADC. All parts operate from single 5-V ANALOG power supply and 3-V to 5-V DIGITAL supply. The SERIAL interface consists of four DIGITAL input [chip select (CS), frame sync (FS), SERIAL input-output clock (SCLK), SERIAL data input (SDI)], and a 3-state SERIAL data output (SDO). CS (works as SS, slave select), SDI, SDO and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form DSP interface. The frame sync signal (FS) indicates the start of a SERIAL data frame being transferred. When multiple CONVERTERS connect to one SERIAL port of a DSP, CS works as the chip select to allow the host DSP to access the individual converter. CS can be tied to ground if only one converter is used. FS must be tied to DVDD if it is not used (such as in an SPI interface). When SDI is tied to DVDD, the device is set in hardware default mode after power on and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS or FS) are needed to interface with the host.

● 14-Bit Resolution for TLC3574/78, 12-Bit for
   TLC2574/2578
● Maximum Throughput 200-KSPS
● Multiple ANALOG Inputs:
   − 8 Single-Ended Channels for
      TLC3578/2578
   − 4 Single-Ended Channels for
      TLC3574/2574
ANALOG Input Range: ±10 V
● Pseudodifferential ANALOG Inputs
● SPI/DSP-Compatible SERIAL Interfaces With
   SCLK up to 25-MHz
● Built-In Conversion Clock and 8x FIFO
● Single 5-V ANALOG Supply; 3-/5-V DIGITAL
   Supply
● Low-Power
   − 5.8 mA in Normal Operation
   − 20 µA in Power Down
● Programmable Autochannel Sweep and
   Repeat
● Hardware-Controlled, Programmable
   Sampling Period
● Hardware Default Configuration
● INL:
   TLC3574/78: ±1 LSB;
   TLC2574/78: ±0.5 LSB
● DNL:
   TLC3574/78: ±0.5 LSB;
   TLC2574/78: ±0.5 LSB
● SINAD:
   TLC3574/78: 79 dB;
   TLC2574/78: 72 dB
● THD:
   TLC3574/78: −82 dB;
   TLC2574/78: −82 dB

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Part Name(s) : TLC3544 TLC3544CDW TLC3544CPW TLC3544CPWG4 TLC3544CPWR TLC3544CPWRG4 TLC3544IDW TLC3544IDWG4 TLC3544IPW TLC3544IPWG4 TLC3548 TLC3548CDW TLC3548CDWG4 TLC3548CDWR TLC3548CDWRG4 TLC3548CPW TLC3548CPWG4 TLC3548CPWR TLC3548CPWRG4 TLC3548IDW TLC3548IDWG4 TLC3548IDWR TLC3548IDWRG4 TLC3548IPW TLC3548IPWG4 TI
Texas Instruments
Description : 5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS

description
The TLC3544 and TLC3548 are a family of 14-bit resolution high-performance, low-power, CMOS ANALOG-to-DIGITAL CONVERTERS (ADC). All devices operate from a single 5-V ANALOG power supply and 3-V to 5-V DIGITAL supply. The SERIAL interface consists of four DIGITAL inputs [chip select (CS), frame sync (FS), SERIAL input-output clock (SCLK), SERIAL data input (SDI)], and a 3-state SERIAL data output (SDO). CS(works as SS, slave select), SDI, SDO, and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form a DSP interface.

14-Bit Resolution
Maximum Throughput 200 KSPS
ANALOG Input Range 0-V to Reference Voltage
Multiple ANALOG Inputs:
– 8 Channels for TLC3548
– 4 Channels for TLC3544
Pseudodifferential ANALOG Inputs
SPI/DSP-Compatible SERIAL Interfaces With SCLK up to 25 MHz
Single 5-V ANALOG Supply; 3-/5-V DIGITAL Supply
Low Power:
– 4 mA (Internal Reference: 1.8 mA) for Normal Operation
– 20 µA in Autopower-Down
Built-In 4-V Reference, Conversion Clock and 8x FIFO
Hardware-Controlled and Programmable Sampling Period
Programmable Autochannel Sweep and Repeat
Hardware Default Configuration
NL: ±1 LSB Max
DNL: ±1 LSB Max
SINAD: 80.8 dB
THD: –95 dB

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Part Name(s) : 5962-9957001Q2A TLV2544Q TLV2544QDG4 TLV2544QDR TLV2548M TLV2548MFK TLV2548MFKB TLV2548MJ TLV2548MJB TLV2548Q TLV2548QDW TLV2548QDWG4 TLV2548QDWR TLV2548QDWRG4 V2544QD TLV2544QD TI
Texas Instruments
Description : 3-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER-DOWN

description
The TLV2544Q, TLV2548Q, and TLV2548M are a family of high performance, 12-bit low power, 3.5 µs, CMOS ANALOG-to-DIGITAL CONVERTERS (ADC) which operate from a single 3-V to 5.5-V power supply. These devices have three DIGITAL inputs and a 3-state output [chip select (CS), SERIAL input-output clock (SCLK), SERIAL data input (SDI), and SERIAL data output (SDO)] that provide a direct 4-wire interface to the SERIAL port of most popular host microprocessors (SPI interface). When interfaced with a DSP, a frame sync (FS) signal is used to indicate the start of a SERIAL data frame.
In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip ANALOG multiplexer that can select any ANALOG inputs or one of three internal self-test voltages.

● Maximum Throughput 200-KSPS
● Built-In Reference, Conversion Clock and
   8× FIFO
● Differential/Integral Nonlinearity Error:
   ±1.2 LSB at −55°C to 125°C
● Signal-to-Noise and Distortion Ratio:
   65 dB, fi = 12-kHz at −55°C to 125°C
● Spurious Free Dynamic Range: 75 dB,
   fi = 12- kHz
● SPI/DSP-Compatible SERIAL Interfaces With
   SCLK up to 20-MHz
● Single Wide Range Supply 3 Vdc to
   5.5 Vdc
ANALOG Input Range 0-V to Supply Voltage
   With 500 kHz BW
● Hardware Controlled and Programmable
   Sampling Period
● Low Operating Current (1-mA at 3.3-V,
   2-mA at 5.5-V With External Ref, 1.7-mA at
   3.3-V, 2.4-mA at 5.5-V With Internal Ref)
● Power Down: Software/Hardware
   Power-Down Mode (1 µA Typ, Ext Ref),
   Autopower-Down Mode (1 µA Typ, Ext Ref)
● Programmable Auto-Channel Sweep
● Available in Q-Temp Automotive
   High Reliability Automotive Applications
   Configuration Control/Print Support
   Qualification to Automotive Standards

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Part Name(s) : TLC2551IDGKR TI
Texas Instruments
Description : 5-V, LOW-POWER, 12-BIT, 175/360 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN

description
The TLC2551, TLC2552, and TLC2555 are a family of high performance, 12-bit, low-power, miniature, CMOS ANALOG-to-DIGITAL CONVERTERS (ADC). The TLC255x family uses a 5-V supply.

● Maximum Throughput . . . 175/360 KSPS
● INL/DNL: ±1 LSB Max, SINAD: 72 dB, SFDR: 85 dB, fi = 20 kHz
● SPI/DSP-Compatible SERIAL Interface
● Single 5-V Supply
● Rail-to-Rail ANALOG Input With 500 kHz BW
● Three Options Available:
    – TLC2551: Single Channel Input
    – TLC2552: Dual Channels With Autosweep
    – TLC2555: Single Channel With Pseudo-Differential Input
● Low Power With Autopower Down
    – Operating Current: 3.5 mA Autopower Down: 8 µA
● Small 8-Pin MSOP and SOIC Packages

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Part Name(s) : TLV1504 TLV1504I TLV1504ID TLV1504IPW TLV1504IPWR TLV1508 TLV1508I TLV1508IDW TLV1508IDWG4 TLV1508IPW TLV1508IPWR TY1504 TY1508 TLV1508IDWR Texas-Instruments
Texas Instruments
Description : 2.7 V TO 5.5 V, 10-BIT, 200 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN

description
The TLV1508 and TLV1504 are a family of high performance, 10-bit low power, 3.86 µs, CMOS ANALOG-to-DIGITAL CONVERTERS (ADC) which operate from a single 2.7-V to 5.5-V power supply. These devices have three DIGITAL inputs and a 3-state output [chip select (CS), SERIAL input-output clock (SCLK), SERIAL data input (SDI), and SERIAL data output (SDO)] that provide a direct 4-wire interface to the SERIAL port of most popular host microprocessors (SPI interface). When interfaced with a TMS320 DSP, a frame sync (FS) signal is used to indicate the start of a SERIAL data frame.

● Maximum Throughput 200-KSPS
● Built-In Reference, Conversion Clock and 8× FIFO
● Differential/Integral Nonlinearity Error: ±1 LSB
● Signal-to-Noise and Distortion Ratio: 59 dB, fi = 12-kHz
● Spurious Free Dynamic Range: 72 dB, fi = 12- kHz
● SPI (CPOL = 0, CPHA = 0)/DSP-Compatible SERIAL Interfaces With SCLK up to 20-MHz
● Single Wide Range Supply 2.7 Vdc to 5.5 Vdc
ANALOG Input Range 0-V to Supply Voltage With 500 kHz BW
● Hardware Controlled and Programmable Sampling Period
● Low Operating Current (1.0-mA at 3.3-V, 1.1-mA at 5.5-V With External Ref
● Power Down: Software/Hardware Power-Down Mode (1 µA Max, Ext Ref), Autopower-Down Mode (1 µA, Ext Ref)
● Programmable Auto-Channel Sweep
● Pin Compatible 12-Bit Upgrades Available (TLV2544, TLV2548)

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Part Name(s) : ADS7866 ADS7866I ADS7866IDBVR ADS7866IDBVRG4 ADS7866IDBVT ADS7866IDBVTG4 ADS7867 ADS7867I ADS7867IDBVR ADS7867IDBVRG4 ADS7867IDBVT ADS7867IDBVTG4 ADS7868 ADS7868I ADS7868IDBVR ADS7868IDBVRG4 ADS7868IDBVT ADS7868IDBVTG4 TI
Texas Instruments
Description : 1.2-V, 12-/10-/8-BIT, 200-KSPS/100-KSPS, MICRO-POWER, MINIATURE ANALOG-TO-DIGITAL CONVERTER WITH SERIAL INTERFACE

DESCRIPTION
The ADS7866/67/68 are low power, miniature, 12/10/8-bit A/D CONVERTERS each with a unipolar, single-ended input. These devices can operate from a single 1.6 V to 3.6 V supply with a 200-KSPS throughput for ADS7866. In addition, these devices can maintain at least a 100-KSPS throughput with a supply as low as 1.2 V.
The sampling, conversion, and activation of DIGITAL output SDO are initiated on the falling edge of CS. The SERIAL clock SCLK is used for controlling the conversion rate and shifting data out of the converter. Furthermore, SCLK provides a mechanism to allow DIGITAL host processors to synchronize with the converter. These CONVERTERS interface with micro-processors or DSPs through a high-speed SPI compatible SERIAL interface. There are no pipeline delays associated with the device.

FEATURES
• Single 1.2-V to 3.6-V Supply Operation
• High Throughput
   – 200/240/280KSPS for 12/10/8-Bit VDD ≥ 1.6 V
   – 100/120/140KSPS for 12/10/8-Bit VDD ≥ 1.2 V
• ±1.5LSB INL, 12-Bit NMC (ADS7866)
• 71 dB SNR, –83 dB THD at fIN = 30 kHz (ADS7866)
• Synchronized Conversion with SCLK
• SPI Compatible SERIAL Interface
• No Pipeline Delays
• Low Power
   – 1.39 mW Typ at 200 KSPS, VDD = 3.6 V
   – 0.39 mW Typ at 200 KSPS, VDD = 1.6 V
   – 0.22 mW Typ at 100 KSPS, VDD = 1.2 V
• Auto Power-Down: 8 nA Typ, 300 nA Max
• 0 V to VDD Unipolar Input Range
• 6-Pin SOT-23 Package

APPLICATIONS
• Battery Powered Systems
• Isolated Data Acquisition
• Medical Instruments
• Portable Communication
• Portable Data Acquisition Systems
• Automatic Test Equipment

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Part Name(s) : TLV2544 TLV2544CD TLV2544CDR TLV2544CPW TLV2544CPWR TLV2544ID TLV2544IDG4 TLV2544IDR TLV2544IPW TLV2544IPWG4 TLV2544IPWR TLV2548 TLV2548CDW TLV2548CDWG4 TLV2548CDWR TLV2548CDWRG4 TLV2548CPW TLV2548CPWG4 TLV2548CPWR TLV2548CPWRG4 TLV2548IDW TLV2548IDWG4 TLV2548IDWR TLV2548IPW TLV2548IPWG4 TI
Texas Instruments
Description : 2.7-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER-DOWN

description
The TLV2548 and TLV2544 are a family of high performance, 12-bit low power, 3.86 µs, CMOS ANALOG-to-DIGITAL CONVERTERS (ADC) which operate from a single 2.7-V to 5.5-V power supply. These devices have three DIGITAL inputs and a 3-state output [chip select (CS), SERIAL input-output clock (SCLK), SERIAL data input (SDI), and SERIAL data output (SDO)] that provide a direct 4-wire interface to the SERIAL port of most popular host microprocessors (SPI interface). When interfaced with a TI DSP, a frame sync (FS) signal is used to indicate the start of a SERIAL data frame.

Maximum Throughput 200-KSPS
Built-In Reference, Conversion Clock and 8×FIFO
Differential/Integral Nonlinearity Error: ±1 LSB
Signal-to-Noise and Distortion Ratio: 70 dB, fi= 12-kHz
Spurious Free Dynamic Range: 75 dB, fi= 12- kHz
SPI (CPOL = 0, CPHA = 0)/DSP-Compatible
  SERIAL Interfaces With SCLK up to 20-MHz
Single Wide Range Supply 2.7 Vdc to 5.5 Vdc
ANALOG Input Range 0-V to Supply Voltage With 500 kHz BW
Hardware Controlled and Programmable Sampling Period
Low Operating Current (1.0-mA at 3.3-V, 1.1-mA at 5.5-V With External Ref
Power Down: Software/Hardware Power-Down Mode (1µA Max, Ext Ref), Autopower-Down Mode (1µA, Ext Ref)
Programmable Auto-Channel Sweep

 

 

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Part Name(s) : TLC3541 TLC3541D TLC3541DGK TLC3541ID TLC3541IDG4 TLC3541IDGK TLC3541IDGKG4 TLC3541IDGKR TLC3541IDR TLC3541IDRG4 TLC3545 TLC3545D TLC3545DGK TLC3545ID TLC3545IDG4 TLC3545IDGK TLC3545IDR TLC3545IDRG4 TI
Texas Instruments
Description : 5-V, LOW POWER, 14-BIT, 200-KSPS, SERIAL ANALOG-TO-DIGITAL WITH AUTO-POWER DOWN

DESCRIPTION
The TLC3541 and TLC3545 are a family of high performance, 14-bit, low power, miniature CMOS ANALOG-to-DIGITAL CONVERTERS (ADCs). These devices operate from a single 5-V supply. Devices are available with single, dual, or single pseudo-differential inputs.

FEATURES
 200-KSPS Sampling Rate
 Built-In Conversion Clock
 INL: ±1 LSB Max DNL: ±1 LSB Max
 SINAD = 81.5 dB, SFDR = 95 dB THD = 94 dB at 15 kHz fin, 200 KSPS
 SPI/DSP-Compatible SERIAL Interfaces With SCLK Input up to 15 MHz
 Single 5-V Supply
 Rail-to-Rail ANALOG Input With 500 kHz BW
 Two Input Options Available:
  − TLC3541 − Single Channel Input
  − TLC3545 − Single Channel, Pseudo-Differential Input
 (TLC3541) Optimized DSP Interface − Requires FS Input Only
 Low Power With Auto-Power Down
  − Operating Current: 3.5 mA
  − Auto-Powerdown Current: 5 µA
 Pin Compatible 12-/14-/16-Bit Family in 8-Pin SOIC and MSOP Packages

APPLICATIONS
 ATE System
 Industrial Process Control
 Measurement
 Motor Control

 

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Part Name(s) : ADS7866 ADS7866I ADS7867 ADS7867I ADS7868 ADS7868I ADS7866IDBVR ADS7866IDBVRG4 ADS7866IDBVT ADS7866IDBVTG4 ADS7867IDBVR ADS7867IDBVRG4 ADS7867IDBVT ADS7867IDBVTG4 ADS7868IDBVR ADS7868IDBVRG4 ADS7868IDBVT ADS7868IDBVTG4 BB
Burr-Brown -> Texas Instruments
Description : 1.2-V, 12-/10-/8-BIT, 200-KSPS/100-KSPS, MICRO-POWER, MINIATURE ANALOG-TO-DIGITAL CONVERTER WITH SERIAL INTERFACE

DESCRIPTION
The ADS7866/67/68 are low power, miniature, 12/10/8-bit A/D CONVERTERS each with a unipolar, single-ended input. These devices can operate from a single 1.6 V to 3.6 V supply with a 200-KSPS throughput for ADS7866. In addition, these devices can maintain at least a 100-KSPS throughput with a supply as low as 1.2 V.
The sampling, conversion, and activation of DIGITAL output SDO are initiated on the falling edge of CS. The SERIAL clock SCLK is used for controlling the conversion rate and shifting data out of the converter. Furthermore, SCLK provides a mechanism to allow DIGITAL host processors to synchronize with the converter. These CONVERTERS interface with micro-processors or DSPs through a high-speed SPI compatible SERIAL interface. There are no pipeline delays associated with the device.

FEATURES
• Single 1.2-V to 3.6-V Supply Operation
• High Throughput
   – 200/240/280KSPS for 12/10/8-Bit VDD ≥ 1.6 V
   – 100/120/140KSPS for 12/10/8-Bit VDD ≥ 1.2 V
• ±1.5LSB INL, 12-Bit NMC (ADS7866)
• 71 dB SNR, –83 dB THD at fIN = 30 kHz (ADS7866)
• Synchronized Conversion with SCLK
• SPI Compatible SERIAL Interface
• No Pipeline Delays
• Low Power
   – 1.39 mW Typ at 200 KSPS, VDD = 3.6 V
   – 0.39 mW Typ at 200 KSPS, VDD = 1.6 V
   – 0.22 mW Typ at 100 KSPS, VDD = 1.2 V
• Auto Power-Down: 8 nA Typ, 300 nA Max
• 0 V to VDD Unipolar Input Range
• 6-Pin SOT-23 Package

APPLICATIONS
• Battery Powered Systems
• Isolated Data Acquisition
• Medical Instruments
• Portable Communication
• Portable Data Acquisition Systems
• Automatic Test Equipment

View
Part Name(s) : TLV2541 TLV2541CDGKG4 TLV2541CDGKR TLV2541ID TLV2541IDG4 TLV2541IDGKG4 TLV2541IDGKR TLV2541IDR TLV2542 TLV2542CDGKG4 TLV2542CDGKR TLV2542ID TLV2542IDG4 TLV2542IDGKG4 TLV2542IDGKR TLV2542IDR TLV2545 TLV2545ID TLV2541CDGK TLV2542CDGK TLV2545CDGK TLV2541IDGK TLV2542IDGK TLV2545IDGK Texas-Instruments
Texas Instruments
Description : 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN

description
The TLV2541, TLV2542, and TLV2545 are a family of high performance, 12-bit, low power, miniature, CMOS ANALOG-to-DIGITAL CONVERTERS (ADC).

● Maximum Throughput . . . 140/200 KSPS
● Built-In Conversion Clock
● INL/DNL: ±1 LSB Max, SINAD: 72 dB,
   SFDR: 85 dB, fi = 20 kHz
● SPI/DSP-Compatible SERIAL Interface
● Single Supply: 2.7 Vdc to 5.5 Vdc
● Rail-to-Rail ANALOG Input With 500 kHz BW
● Three Options Available:
   − TLV2541: Single Channel Input
   − TLV2542: Dual Channels With Autosweep
   − TLV2545: Single Channel With Pseudo-Differential Input
● Low Power With Autopower Down
   − Operating Current: 1 mA at 2.7 V, 1.5 mA at 5 V
      Autopower Down: 2 μA at 2.7 V, 5 μA at 5 V
● Small 8-Pin MSOP and SOIC Packages

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