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Part Name(s) : NT256D64S8HA0G-6
ETC1
Unspecified
Description : 184pin Two Bank Unbuffered DDR SDRAM MODULE

[Nanya]

Description
NT256D64S8HA0G-6 is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a dual-Bank high-speed memory array. The 32Mx64 MODULE is a Two-Bank DIMM that uses sixteen 16Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 333MHz. The DIMM is intended for use in applications operating from 133 MHz to 166 MHz clock speeds with data rates of 266 to 333 MHz. Clock enable CKE0 and / or CKE1 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance :
• Intended for 166 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
•  MODULE has Two physical Banks
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions. Also aligns QFC transitions with clock during Read cycles
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 12/10/2 ADDRessing (row/column/Bank)
• 15.6 ms Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

ETC1
Unspecified
Description : 184pin One Bank Unbuffered DDR SDRAM MODULE

[Nanya]

Description
NT256D64S88ABG is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a one-Bank high-speed memory array. The 32Mx64 MODULE is a single-Bank DIMM that uses eight 32Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 333MHz. The DIMM is intended for use in applications operating from 133 MHz to 166 MHz clock speeds with data rates of 266 to 333 MHz. Clock enable CKE0 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance:
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
SDRAMs have 4 internal Banks for concurrent operation
MODULE has one physical Bank
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions.
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto-Refresh (CBR) and Self-Refresh Modes
• Automatic and controlled precharge commands
• 13/10/1 ADDRessing (row/column/Bank)
• 7.8 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

ETC
Unspecified
Description : 184pin One Bank Unbuffered DDR SDRAM MODULE

[Nanya]

Description
NT256D64S88AAG is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a one-Bank high-speed memory array. The 32Mx64 MODULE is a single-Bank DIMM that uses eight 32Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 333MHz. The DIMM is intended for use in applications operating from 133 MHz to 166 MHz clock speeds with data rates of 266 to 333 MHz. Clock enable CKE0 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance:
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
MODULE has one physical Bank
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions.
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto-Refresh (CBR) and Self-Refresh Modes
• Automatic and controlled precharge commands
• 13/10/2 ADDRessing (row/column/Bank)
• 7.8 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

Description : 184pin One Bank Unbuffered DDR SDRAM MODULE Based on DDR266/200 32Mx8 SDRAM

Description
NT256D64S88AAG is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a one-Bank high-speed memory array. The 32Mx64 MODULE is a single-Bank DIMM that uses eight 32Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 266MHz. The DIMM is intended for use in applications operating from 100 MHz to 133 MHz clock speeds with data rates of 200 to 266 MHz. Clock enable CKE0 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance:
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
SDRAMs have 4 internal Banks for concurrent operation
MODULE has one physical Bank
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions.
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto-Refresh (CBR) and Self-Refresh Modes
• Automatic and controlled precharge commands
• 13/10/1 ADDRessing (row/column/Bank)
• 7.8 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

Description : 184pin One Bank Unbuffered DDR SDRAM MODULE Based on DDR266/200 32Mx8 SDRAM

[Nanya]

Description
NT256D64S88A0G is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a one-Bank high-speed memory array. The 32Mx64 MODULE is a single-Bank DIMM that uses eight 32Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 266MHz. The DIMM is intended for use in applications operating from 100 MHz to 133 MHz clock speeds with data rates of 200 to 266 MHz. Clock enable CKE0 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance :
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
MODULE has one physical Bank
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions. Also aligns QFC transitions with clock during Read cycles •ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 13/10/2 ADDRessing (row/column/Bank)
• 7.8 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

Description : 184pin Two Bank Unbuffered DDR SDRAM MODULE Based on DDR266/200 16Mx8 SDRAM

Description
NT256D64S8HA0G is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a dual-Bank high-speed memory array. The 32Mx64 MODULE is a Two-Bank DIMM that uses sixteen 16Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 266MHz. The DIMM is intended for use in applications operating from 100 MHz to 133 MHz clock speeds with data rates of 200 to 266 MHz. Clock enable CKE0 and / or CKE1 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance :
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
MODULE has Two physical Banks
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions. Also aligns QFC transitions with clock during Read cycles
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 12/10/2 ADDRessing (row/column/Bank)
• 15.6 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

Description : 184pin One Bank Unbuffered DDR SDRAM MODULE

Description
NT256D64S88A0G is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a one-Bank high-speed memory array. The 32Mx64 MODULE is a single-Bank DIMM that uses eight 32Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 266MHz. The DIMM is intended for use in applications operating from 100 MHz to 133 MHz clock speeds with data rates of 200 to 266 MHz. Clock enable CKE0 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance :
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
MODULE has one physical Bank
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions. Also aligns QFC transitions with clock during Read cycles •ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 13/10/2 ADDRessing (row/column/Bank)
• 7.8 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

Description : 184pin Two Bank Unbuffered DDR SDRAM MODULE

[Nanya]

Description
NT256D64S8HA0G is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a dual-Bank high-speed memory array. The 32Mx64 MODULE is a Two-Bank DIMM that uses sixteen 16Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 266MHz. The DIMM is intended for use in applications operating from 100 MHz to 133 MHz clock speeds with data rates of 200 to 266 MHz. Clock enable CKE0 and / or CKE1 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 32Mx64 Double Data Rate (DDR) SDRAM DIMM
• Performance :
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
MODULE has Two physical Banks
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions. Also aligns QFC transitions with clock during Read cycles
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 2, 2.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 12/10/2 ADDRessing (row/column/Bank)
• 15.6 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

Description : 184pin One Bank Unbuffered DDR SDRAM MODULE

Description
NT128D64S88A0G is an Unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a one-Bank high-speed memory array. The 16Mx64 MODULE is a single-Bank DIMM that uses eight 16Mx8 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 266MHz. The DIMM is intended for use in applications operating from 100 MHz to 133 MHz clock speeds with data rates of 200 to 266 MHz. Clock enable CKE0 controls all devices on the DIMM.

Features
• 184-Pin Unbuffered 8-Byte Dual In-Line Memory MODULE
• 16Mx64 Double Data Rate (DDR) SDRAMDIMM (16M X 8 SDRAMS)
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ±?0.2, VDD = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
MODULE has one physical Bank
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions.
   Also aligns QFC transitions with clock during Read cycles
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
   - DIMMCAS Latency: 2, 2.5
   - Burst Type: Sequential or Interleave
   - Burst Length: 2, 4, 8
   - Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 12/10/2 ADDRessing (row/column/Bank)
• 15.6 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

Description : 184pin One Bank Registered DDR SDRAM MODULE Based on 64Mx4 DDR SDRAM

Description
NT512D72S4PA0GR is a registered 184-Pin Double Data Rate (DDR) Synchronous DRAM Dual In-Line Memory MODULE (DIMM), organized as a one-Bank high-speed memory array. The 64Mx72 MODULE is a single-Bank DIMM that uses eighteen 64Mx4 DDR SDRAMs in 400 mil TSOP packages. The DIMM achieves high-speed data transfer rates of up to 266MHz. The DIMM is intended for use in applications operating from 100 MHz to 133 MHz clock speeds with data rates of 200 to 266 MHz. Clock enable CKE0 controls all devices on the DIMM.

Features
• 184-Pin Registered 8-Byte Dual In-Line Memory MODULE
• 64Mx72 Double Data Rate (DDR) SDRAM DIMM
• Performance :
• Intended for 100 MHz and 133 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = 2.5Volt ± 0.2, VDDQ = 2.5Volt ± 0.2
• Single Pulsed RAS interface
SDRAMs have 4 internal Banks for concurrent operation
MODULE has one physical Bank
• Differential clock inputs
• Data is read or written on both clock edges
• Bi-directional data strobe with one clock cycle preamble and one-half clock post-amble
• ADDRess and control signals are fully synchronous to positive clock edge
• Programmable Operation:
    - DIMM CAS Latency: 3, 3.5
    - Burst Type: Sequential or Interleave
    - Burst Length: 2, 4, 8
    - Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 13/11/2 ADDRessing (row/column/Bank)
• 7.8 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
SDRAMs in 66-pin TSOP Type II Package

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