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Part Name(s) : HD74ALVCH16244 Renesas
Renesas Electronics
Description : 16-BIT BUFFERS / DRIVERS WITH 3-STATE OUTPUTS View

Description
The HD74ALVCH16244 is designed specifically to improve both the performance and density of three state memory address DRIVERS, clock DRIVERS, and bus oriented receivers and transmitters. The device can be used as four 4-bit BUFFERS, two 8-bit BUFFERS, or one 16-BIT buffer. It provides true OUTPUTS and symmetrical OE (active-low output-enable) inputs. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

Part Name(s) : HD74ALVCH16244 Hitachi
Hitachi -> Renesas Electronics
Description : 16-BIT BUFFERS / DRIVERS WITH 3-STATE OUTPUTS View

Description
The HD74ALVCH16244 is designed specifically to improve both the performance and density of three state memory address DRIVERS, clock DRIVERS, and bus oriented receivers and transmitters. The device can be used as four 4-bit BUFFERS, two 8-bit BUFFERS, or one 16-BIT buffer. It provides true OUTPUTS and symmetrical OE (active-low output-enable) inputs. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

Part Name(s) : HD74ALVCH162244 Renesas
Renesas Electronics
Description : 16-BIT BUFFERS / DRIVERS WITH 3-STATE OUTPUTS View

Description
The HD74ALVCH162244 is designed specifically to improve both the performance and density of 3-STATE memory address DRIVERS, clock DRIVERS, and bus oriented receivers and transmitters. The device can be used as four 4-bit BUFFERS, two 8-bit BUFFERS, or one 16-BIT buffer. It provides true OUTPUTS and symmetrical active-low output-enable (OE) inputs.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
All OUTPUTS, which are designed to sink up to 12 mA, include 26 Ω resistors to reduce overshoot and undershoot.

• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
• All OUTPUTS have equivalent 26 Ω series resistors, so no external resistors are required.

Part Name(s) : HD74ALVCH162244 Hitachi
Hitachi -> Renesas Electronics
Description : 16-BIT BUFFERS / DRIVERS WITH 3-STATE OUTPUTS View

Description
The HD74ALVCH162244 is designed specifically to improve both the performance and density of 3-STATE memory address DRIVERS, clock DRIVERS, and bus oriented receivers and transmitters. The device can be used as four 4-bit BUFFERS, two 8-bit BUFFERS, or one 16-BIT buffer. It provides true OUTPUTS and symmetrical active-low output-enable (OE) inputs.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
All OUTPUTS, which are designed to sink up to 12 mA, include 26 Ω resistors to reduce overshoot and undershoot.

Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
• All OUTPUTS have equivalent 26 Ω series resistors, so no external resistors are required.


Part Name(s) : 54AC16244 54AC16244WD 74AC16244 74AC16244DGG 74AC16244DGGR 74AC16244DGGRE4 74AC16244DGGRG4 74AC16244DL 74AC16244DLG4 74AC16244DLR 74AC16244DLRG4 TI
Texas Instruments
Description : 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS View

description
The ’AC16244 are 16-BIT BUFFERS/line DRIVERS designed specifically to improve both the performance and density of 3-STATE memory address DRIVERS, clock DRIVERS, and bus-oriented receivers and transmitters. They can be used as four 4-bit BUFFERS, two 8-bit BUFFERS, or one 16-BIT buffer. These devices provide true OUTPUTS and symmetrical active-low output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y OUTPUTS. When OE is high, the OUTPUTS are in the high-impedance state.

● Members of the Texas Instruments Widebus Family
3-STATE OUTPUTS Drive Bus Lines or Buffer Memory Address Registers
● Flow-Through Architecture Optimizes PCB Layout
● Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise
● EPIC  (Enhanced-Performance Implanted CMOS) 1-m Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Plastic 300-mil
    Shrink Small-Outline (DL) and Thin Shrink
    Small-Outline (DGG) Packages Using 25-mil
    Center-to-Center Pin Spacings, and 380-mil
    Fine-Pitch Ceramic Flat (WD) Packages
    Using 25-mil Center-to-Center Pin Spacings

Part Name(s) : 5962-9202201MXA 74ACT16244 74ACT16244DGG 74ACT16244DGGR 74ACT16244DGGRE4 74ACT16244DGGRG4 74ACT16244DL 74ACT16244DLG4 74ACT16244DLR 74ACT16244DLRG4 SN54ACT16244 SNJ54ACT16244WD TI
Texas Instruments
Description : 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS View

description
The SN54ACT16244 and 74ACT16244 are 16-BIT BUFFERS/line DRIVERS designed specifically to improve both the performance and density of 3-STATE memory address DRIVERS, clock DRIVERS, and bus-oriented receivers and transmitters. They can be used as four 4-bit BUFFERS, two 8-bit BUFFERS, or one 16-BIT buffer. The devices provide true OUTPUTS and symmetrical OE(active-low) output-enable inputs.

Members of the Texas Instruments WidebusFamily
Inputs Are TTL-Voltage Compatible
3-STATE OUTPUTS Drive Bus Lines or Buffer Memory Address Registers
Flow-Through Architecture Optimizes PCB Layout
Distributed VCCand GND Pin Configurations Minimize High-Speed Switching Noise
EPIC(Enhanced-Performance Implanted CMOS) 1-m Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

Part Name(s) : 5962-9458701QXA 74ABT162244DGGRG4 ABT162244 AH2244 SN54ABT162244 SN54ABT162244WD SN74ABT162244DGG SN74ABT162244DGV SN74ABT162244 SN74ABT162244DGGR SN74ABT162244DGVR SN74ABT162244DL SN74ABT162244DLG4 SN74ABT162244DLR SNJ54ABT162244WD TI
Texas Instruments
Description : 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS View

description/ordering information
The ’ABT162244 devices are 16-BIT BUFFERS and line DRIVERS designed specifically to improve both the performance and density of 3-STATE memory address DRIVERS, clock DRIVERS, and bus-oriented receivers and transmitters. These devices can be used as four 4-bit BUFFERS, two 8-bit BUFFERS, or one 16-BIT buffer. These devices provide noninverting OUTPUTS and symmetrical active-low output-enable (OE) inputs.
The OUTPUTS, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-STATE. The Ioff circuitry disables the OUTPUTS, preventing damaging current backflow through the devices when they are powered down. The power-up 3-STATE circuitry places the OUTPUTS in the high-impedance state during power up and power down, which prevents driver conflict.

● Members of the Texas Instruments
   Widebus ™ Family
● Output Ports Have Equivalent 25-Ω Series
   Resistors, So No External Resistors Are
   Required
● Typical VOLP (Output Ground Bounce)
   <1 V at VCC = 5 V, TA = 25°C
● High-Impedance State During Power Up
   and Power Down
● Ioff and Power-Up 3-STATE Support Hot
   Insertion
● Distributed VCC and GND Pins Minimize
  High-Speed Switching Noise
● Flow-Through Architecture Optimizes PCB
   Layout
● Latch-Up Performance Exceeds 500 mA Per
   JESD-17

Part Name(s) : 74ACT16240 74ACT16240DL 74ACT16240DLR SN54ACT16240 SN54ACT16240WD TI
Texas Instruments
Description : 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS View

description
The SN54ACT16240 and 74ACT16240 are 16-BIT BUFFERS or line DRIVERS designed specifically to improve both the performance and density of 3-STATE memory address DRIVERS, clock DRIVERS, and bus-oriented receivers and transmitters.

◆ Members of the Texas Instruments Widebus™ Family
◆ Inputs Are TTL-Voltage Compatible
3-STATE OUTPUTS Drive Bus Lines or Buffer Memory Address Registers
◆ Flow-Through Architecture Optimizes PCB Layout
◆ Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
◆ EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process
◆ 500-mA Typical Latch-Up Immunity at 125°C
◆ Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Spacings

Part Name(s) : HD74LVCZ16244A Hitachi
Hitachi -> Renesas Electronics
Description : 16?bit BUFFERS / Line DRIVERS WITH 3?state OUTPUTS View

Description
The HD74LVCZ16244A has sixteen line DRIVERS WITH three state OUTPUTS in a 48 pin package. This device is a non inverting buffer and has four active low enables (1G to 4G). Each enable independently controls four BUFFERS.

Features
• VCC = 2.7 to 5.5 V
• All inputs VIH (Max) = 5.5 V (@VCC = 0 to 5.5 V)
• All OUTPUTS VO (Max) = 5.5 V (@VCC = 0 V or output off state)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High impedance state during power up and power down
• Power off disables OUTPUTS, permitting live insertion
• High output current ±24 mA (@VCC = 3.0 to 5.5 V)

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