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Part Name(s) : M36W216 M36W216BI M36W216BI70ZA1T M36W216BI85ZA1T M36W216BIZA M36W216T M36W216TI M36W216TI-ZAT M36W216TI70ZA1T M36W216TI85ZA1T M36W216TIZA ST-Microelectronics
STMicroelectronics
Description : 16 MBIT 1MB x16 / BOOT BLOCK FLASH MEMORY AND 2 MBIT 128KB x16 SRAM / Multiple MEMORY Product

SUMMARY DESCRIPTION
The M36W216TI is a low voltage Multiple MEMORY Product which combines two MEMORY devices; a
16 MBIT BOOT BLOCK FLASH MEMORY AND a 2 MBIT SRAM. Recommended operating conditions do not allow both the FLASH MEMORY AND the SRAM MEMORY to be active at the same time. The MEMORY is offered in a Stacked LFBGA66 (12x8mm, 8 x 8 active ball, 0.8 mm pitch) package AND is supplied with all the bits erased (set to ‘1’).

FEATURES SUMMARY
■MULTIPLE MEMORY PRODUCT
16 MBIT (1MB x 16) BOOT BLOCK FLASH MEMORY
– 2 MBIT (128KB x 16) SRAM
■SUPPLY VOLTAGE
–VDDF= VDDS= 2.7V to 3.3V
–VDDQF= VDDS= 2.7V to 3.3V
–VPPF= 12V for Fast Program (optional)
■ACCESS TIME: 70ns, 85ns
■LOW POWER CONSUMPTION
■ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M36W216TI: 88CEh
– Bottom Device Code, M36W216BI: 88CFh

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Part Name(s) : M36W108AB M36W108ABZM M36W108ABZN M36W108AT M36W108ATZM M36W108ATZN M36W108AT100ZM1T M36W108AT100ZM5T M36W108AT100ZM6T M36W108AT100ZN1T M36W108AT100ZN5T M36W108AT100ZN6T M36W108AT120ZM1T M36W108AT120ZM5T M36W108AT120ZM6T M36W108AT120ZN1T M36W108AT120ZN5T M36W108AT120ZN6T M36W108AB100ZM1T M36W108AB100ZM5T M36W108AB100ZM6T M36W108AB100ZN1T M36W108AB100ZN5T M36W108AB100ZN6T M36W108AB120ZM1T ST-Microelectronics
STMicroelectronics
Description : 8 MBIT (1MB x8, BOOT BLOCK) FLASH MEMORY AND 1 MBIT (128KB x8) SRAM Low Voltage Multi-MEMORY Product

DESCRIPTION
The M36W108A is multi-chip device containing an 8 MBIT BOOT BLOCK FLASH MEMORY AND a 1 MBIT of SRAM. The device is offered in the new Chip Scale Package solutions: LBGA48 1.0mm ball pitch AND LGA48 1.0mm lAND pitch.

■ SUPPLY VOLTAGE
    – VCCF = VCCS = 2.7V to 3.6V: for Program, Erase AND Read
■ ACCESS TIME: 100ns
■ LOW POWER CONSUMPTION
    – Read: 40mA max. (SRAM chip)
    – StAND-by: 30µA max. (SRAM chip)
    – Read: 10mA max. (FLASH chip)
    – StAND-by: 100µA max. (FLASH chip)

FLASH MEMORY
■ 8 MBIT (1MB x 8) BOOT BLOCK ERASE
■ PROGRAMMING TIME: 10µs typical
■ PROGRAM/ERASE CONTROLLER (P/E.C.)
    – Program Byte-by-Byte
    – Status Register bits AND Ready/Busy Output
■ SECURITY PROTECTION MEMORY AREA
■ INSTRUCTION ADDRESS CODING: 3 digits
MEMORY BLOCKS
    – BOOT BLOCK (Top or Bottom location)
    – Parameter AND Main BLOCKs
BLOCK, MULTI-BLOCK AND CHIP ERASE
■ ERASE SUSPEND AND RESUME MODES
    – Read AND Program another BLOCK during Erase Suspend
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK
■ ELECTRONIC SIGNATURE
    – Manufacturer Code: 20h
    – Device Code, M36W108AT: D2h
    – Device Code, M36W108AB: DCh

SRAM
■ 1 MBIT (128KB x 8)
■ POWER DOWN FEATURES USING TWO CHIP ENABLE INPUTS
■ LOW VCC DATA RETENTION: 2V

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Part Name(s) : M36W832BE M36W832BE-ZAT M36W832BE70ZA1S M36W832BE70ZA1T M36W832BE70ZA6S M36W832BE70ZA6T M36W832BE85ZA1S M36W832BE85ZA1T M36W832BE85ZA6S M36W832BE85ZA6T M36W832TE M36W832TE-ZAT M36W832TE70ZA1S M36W832TE70ZA1T M36W832TE70ZA6S M36W832TE70ZA6T M36W832TE85ZA1S M36W832TE85ZA1T M36W832TE85ZA6S M36W832TE85ZA6T ST-Microelectronics
STMicroelectronics
Description : 32 MBIT (2Mb x16, BOOT BLOCK) FLASH MEMORY AND 8 MBIT (512Kb x16) SRAM, Multiple MEMORY Product

SUMMARY DESCRIPTION
The M36W832TE is a low voltage Multiple MEMORY Product which combines two MEMORY devices; a 32 MBIT BOOT BLOCK FLASH MEMORY AND an 8 MBIT SRAM. Recommended operating conditions do not allow both the FLASH AND the SRAM to be active at the same time.

FEATURES SUMMARY
■ SUPPLY VOLTAGE
    – VDDF = 2.7V to 3.3V
    – VDDS = VDDQF = 2.7V to 3.3V
    – VPPF = 12V for Fast Program (optional)
■ ACCESS TIMES: 70ns AND 85ns
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
    – Manufacturer Code: 20h
    – Top Device Code, M36W832TE: 88BAh
    – Bottom Device Code, M36W832BE: 88BBh

FLASH MEMORY
■ 32 MBIT (2Mb x16) BOOT BLOCK
    – 8 x 4 KWord Parameter BLOCKs (Top or Bottom Location)
■ PROGRAMMING TIME
    – 10µs typical
    – Double Word Programming Option
    – Quadruple Word Programming Option
BLOCK LOCKING
    – All BLOCKs locked at Power up
    – Any combination of BLOCKs can be locked
    – WPF for BLOCK Lock-Down
■ AUTOMATIC STANDBY MODE
■ PROGRAM AND ERASE SUSPEND
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK
■ COMMON FLASH INTERFACE
■ SECURITY
    – 128 bit user programmable OTP cells
    – 64 bit unique device identifier

SRAM
■ 8 MBIT (512Kb x 16)
■ ACCESS TIME: 70ns
■ LOW VDDS DATA RETENTION: 1.5V
■ POWER DOWN FEATURES USING TWO CHIP ENABLE INPUTS

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Part Name(s) : M36W432BG M36W432BG-ZAT M36W432BG70ZA1 M36W432BG70ZA1T M36W432BG70ZA6 M36W432BG70ZA6T M36W432BG85ZA1 M36W432BG85ZA1T M36W432BG85ZA6 M36W432BG85ZA6T M36W432TG M36W432TG-ZAT M36W432TG70ZA1 M36W432TG70ZA1T M36W432TG70ZA6 M36W432TG70ZA6T M36W432TG85ZA1 M36W432TG85ZA1T M36W432TG85ZA6 M36W432TG85ZA6T M36W432TG-ZA M36W432BG-ZA STMICROELECTRONICS
STMicroelectronics
Description : 32 MBIT (2Mb x16, BOOT BLOCK) FLASH MEMORY AND 4 MBIT (256Kb x16) SRAM, Multiple MEMORY Product

SUMMARY DESCRIPTION
The M36W432TG is a low voltage Multiple MEMORY Product which combines two MEMORY devices; a 32 MBIT BOOT BLOCK FLASH MEMORY AND a 4 MBIT SRAM. Recommended operating conditions do not allow both the FLASH AND SRAM devices to be active at the same time.

FEATURES SUMMARY
■ MULTIPLE MEMORY PRODUCT
    – 32 MBIT (2Mb x 16), BOOT BLOCK, FLASH MEMORY
    – 4 MBIT (256Kb x 16) SRAM MEMORY
■ SUPPLY VOLTAGE
    – VDDF = 2.7V to 3.3V
    – VDDS = VDDQF = 2.7V to 3.3V
    – VPPF = 12V for Fast Program (optional)
■ ACCESS TIME: 70ns, 85ns
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
    – Manufacturer Code: 20h
    – Top Device Code, M36W432TG: 88BAh
    – Bottom Device Code, M36W432BG: 88BBh

FLASH MEMORY
MEMORY BLOCKS
    – Parameter BLOCKs (Top or Bottom Location)
    – Main BLOCKs
■ PROGRAMMING TIME
    – 10µs typical
    – Double Word Programming Option
    – Quadruple Word Programming Option
BLOCK LOCKING
    – All BLOCKs locked at Power up
    – Any combination of BLOCKs can be locked
    – WPF for BLOCK Lock-Down
■ AUTOMATIC STANDBY MODE
■ PROGRAM AND ERASE SUSPEND
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK
■ COMMON FLASH INTERFACE
■ SECURITY
    – 128 bit user programmable OTP cells
    – 64 bit unique device identifier

SRAM
■ 4 MBIT (256Kb x 16)
■ ACCESS TIME: 70ns
■ LOW VDDS DATA RETENTION: 1.5V
■ POWER DOWN FEATURES USING TWO CHIP ENABLE INPUTS

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Part Name(s) : AB28F400BX-T90 AB28F400BX-B90 Intel
Intel
Description : 4-MBIT (256K x16, 512K x8) BOOT BLOCK FLASH MEMORY FAMILY

Intel’s 4-MBIT FLASH MEMORY Family is an extension of the BOOT BLOCK Architecture which includes BLOCK selective erasure, automated write AND erase operations AND stANDard microprocessor interface. The 4-MBIT FLASH MEMORY Family enhances the BOOT BLOCK Architecture by adding more density AND BLOCKs, x8/x16 input/ output control, very high speed, low power, an industry stANDard ROM compatible pinout AND surface mount packaging. The 4-MBIT FLASH family is an easy upgrade from Intel’s 2-MBIT BOOT BLOCK FLASH MEMORY Family.

■ x8/x16 Input/Output Architecture
    — A28F400BX-T, A28F400BX-B
    — For High Performance AND High Integration 16-bit AND 32-bit CPUs
■ Optimized High Density BLOCKed Architecture
    — One 16 KB Protected BOOT BLOCK
    — Two 8 KB Parameter BLOCKs
    — One 96 KB Main BLOCK
    — Three 128 KB Main BLOCKs
    — Top or Bottom BOOT Locations
■ Extended Cycling Capability
    — 1,000 BLOCK Erase Cycles
■ Automated Word/Byte Write AND BLOCK Erase
    — CommAND User Interface
    — Status Register
    — Erase Suspend Capability
SRAM-Compatible Write Interface
■ Automatic Power Savings Feature
    — 1 mA Typical ICC Active Current in Static Operation
■ Very High-Performance Read
    — 90 ns Maximum Access Time
    — 45 ns Maximum Output Enable Time
■ Low Power Consumption
    — 25 mA Typical Active Read Current
■ Deep Power-Down/Reset Input
    — Acts as Reset for BOOT Operations
■ Automotive Temperature Operation
    — b40§C to a125§C
■ Write Protection for BOOT BLOCK
■ Hardware Data Protection Feature
    — Erase/Write Lockout During Power Transitions
■ Industry StANDard Surface Mount Packaging
    — JEDEC ROM Compatible 44-Lead PSOP
■ 12V Word/Byte Write AND BLOCK Erase
    — VPP e 12V g5% StANDard
■ ETOXTM III FLASH Technology
    — 5V Read

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Part Name(s) : M36DR432-ZAT M36DR432A M36DR432A100ZA6C M36DR432A100ZA6T M36DR432A120ZA6C M36DR432A120ZA6T M36DR432AZA M36DR432B M36DR432B100ZA6C M36DR432B100ZA6T M36DR432B120ZA6C M36DR432B120ZA6T M36DR432BZA STMICROELECTRONICS
STMicroelectronics
Description : 32 MBIT (2Mb x16, Dual Bank, Page) FLASH MEMORY AND 4 MBIT (256K x16) SRAM, Multiple MEMORY Product

DESCRIPTION
The M36DR432 is a multichip MEMORY device containing a 32 MBIT BOOT BLOCK FLASH MEMORY AND a 4 MBIT of SRAM. The device is offered in a Stacked LFBGA66 (0.8 mm pitch) package.

FEATURES SUMMARY
■ SUPPLY VOLTAGE
    – VDDF = VDDS =1.65V to 2.2V
    – VPPF = 12V for Fast Program (optional)
■ ACCESS TIME: 100,120ns
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
    – Manufacturer Code: 20h
    – Top Device Code, M36DR432A: 00A0h
    – Bottom Device Code, M36DR432B: 00A1h

FLASH MEMORY
■ 32 MBIT (2Mb x16) BOOT BLOCK
    – Parameter BLOCKs (Top or Bottom Location)
■ PROGRAMMING TIME
    – 10µs typical
    – Double Word Programming Option
■ ASYNCRONOUS PAGE MODE READ
    – Page width: 4 Word
    – Page Mode Access Time: 35ns
■ DUAL BANK OPERATION
    – Read within one Bank while Program or Erase within the other
    – No Delay between Read AND Write Operations
BLOCK PROTECTION ON ALL BLOCKS
    – WPF for BLOCK Locking
■ COMMON FLASH INTERFACE
    – 64 bit Security Code

SRAM
■ 4 MBIT (256K x 16 bit)
■ LOW VDDS DATA RETENTION: 1V
■ POWER DOWN FEATURES USING TWO CHIP ENABLE INPUTS

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Part Name(s) : M36W0R6040B0 M36W0R6040B0ZAQ M36W0R6040B0ZAQE M36W0R6040B0ZAQF M36W0R6040B0ZAQT M36W0R6040T0 M36W0R6040T0ZAQ M36W0R6040T0ZAQE M36W0R6040T0ZAQF M36W0R6040T0ZAQT ST-Microelectronics
STMicroelectronics
Description : 64 MBIT (4Mb x16, Multiple Bank, Burst) FLASH MEMORY AND 16 MBIT (1MB x16) PSRAM, Multi-Chip Package

SUMMARY DESCRIPTION
The M36W0R6040T0 AND M36W0R6040B0 are Multiple MEMORY Products which combine two MEMORY devices; a 64-MBIT, Multiple Bank FLASH memories, the M58WR064FT/B, AND a 16-MBIT Pseudo SRAM, the M69AR024B. Recommended operating conditions do not allow more than one MEMORY to be active at the same time. The MEMORY is offered in a Stacked TFBGA88 (8x10mm, 8x10 ball array, 0.8mm pitch) package.
In addition to the stANDard version, the packages are also available in Lead-free version, in compliance with JEDEC Std J-STD-020B, the ST ECO PACK 7191395 Specification, AND the RoHS (Restriction of Hazardous Substances) directive.
All packages are compliant with Lead-free soldering processes.

FEATURES SUMMARY
■ MULTI-CHIP PACKAGE
   – 1 die of 64 MBIT (4Mb x 16) FLASH MEMORY
   – 1 die of 16 MBIT (1MB x 16) Pseudo SRAM
■ SUPPLY VOLTAGE
   – VDDF = VDDP = VDDQ = 1.7V to 1.95V
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
   – Manufacturer Code: 20h
   – Device Code (Top FLASH Configuration), M36W0R6040T0: 8810h
   – Device Code (Bottom FLASH Configuration), M36W0R6040B0: 8811h
■ PACKAGES
   – Compliant with Lead-Free Soldering Processes
   – Lead-Free Versions

FLASH MEMORY
■ PROGRAMMING TIME
   – 8µs by Word typical for Fast Factory Program
   – Double/Quadruple Word Program option
   – Enhanced Factory Program options
MEMORY BLOCKS
   – Multiple Bank MEMORY Array: 4 MBIT Banks
   – Parameter BLOCKs (Top location)
■ SYNCHRONOUS / ASYNCHRONOUS READ
   – Synchronous Burst Read mode: 66MHz
   – Asynchronous/ Synchronous Page Read mode
   – RANDom Access: 70ns
■ DUAL OPERATIONS
   – Program Erase in one Bank while Read in others
   – No delay between Read AND Write operations
BLOCK LOCKING
   – All BLOCKs locked at Power-up
   – Any combination of BLOCKs can be locked
   – WPF for BLOCK Lock-Down
■ SECURITY
   – 128-bit user programmable OTP cells
   – 64-bit unique device number
■ COMMON FLASH INTERFACE (CFI)
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK

PSRAM
■ ACCESS TIME: 70ns
■ LOW STANDBY CURRENT: 110µA
■ DEEP POWER DOWN CURRENT: 10µA

 

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Part Name(s) : M29W160EB M29W160EB79N6 M29W160EB79N6E M29W160EB79N6F M29W160EB79N6T M29W160EB79ZA6 M29W160EB79ZA6E M29W160EB79ZA6F M29W160EB79ZA6T M29W160EB90N6 M29W160EB90N6E M29W160EB90N6F M29W160EB90N6T M29W160EB90ZA6 M29W160EB90ZA6E M29W160EB90ZA6F M29W160EB90ZA6T M29W160ET M29W160ET79N6 M29W160ET79N6E M29W160ET79N6F M29W160ET79N6T M29W160ET79ZA6 M29W160ET79ZA6E M29W160ET79ZA6F ST-Microelectronics
STMicroelectronics
Description : 16 MBIT (2Mb x8 or 1MB x16, BOOT BLOCK) 3V Supply FLASH MEMORY

SUMMARY DESCRIPTION
The M29W160E is a 16 MBIT (2Mb x8 or 1MB x16) non-volatile MEMORY that can be read, erased AND reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the MEMORY defaults to its Read mode where it can be read in the same way as a ROM or EPROM.

FEATURES SUMMARY
■ SUPPLY VOLTAGE
– VCC = 2.7V to 3.6V for Program, Erase AND Read
■ ACCESS TIMES: 70, 90ns
■ PROGRAMMING TIME
– 10µs per Byte/Word typical
■ 35 MEMORY BLOCKS
– 1 BOOT BLOCK (Top or Bottom Location)
– 2 Parameter AND 32 Main BLOCKs
■ PROGRAM/ERASE CONTROLLER
– Embedded Byte/Word Program algorithms
■ ERASE SUSPEND AND RESUME MODES
– Read AND Program another BLOCK during Erase Suspend
■ UNLOCK BYPASS PROGRAM COMMAND
– Faster Production/Batch Programming
■ TEMPORARY BLOCK UNPROTECTION MODE
■ COMMON FLASH INTERFACE
– 64 bit Security Code
■ LOW POWER CONSUMPTION
– StANDby AND Automatic StANDby
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Top Device Code M29W160ET: 22C4h
– Bottom Device Code M29W160EB: 2249h

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Part Name(s) : A28F200BX-B A28F200BX-T AB28F200BX-B90 AB28F200BX-T90 Intel
Intel
Description : 2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY

Intel’s 2-MBIT FLASH MEMORY Family is an extension of the BOOT BLOCK Architecture which includes BLOCK-selective erasure, automated write AND erase operations AND stANDard microprocessor interface. The 2 MBIT FLASH MEMORY Family enhances the BOOT BLOCK Architecture by adding more density AND BLOCKs, x8/x16 input/output control, very high speed, low power, an industry stANDard ROM compatible pinout. The 2-MBIT FLASH family allows for an easy upgrade to Intel’s 4-MBIT BOOT BLOCK FLASH MEMORY Family.

■ x8/x16 Input/Output Architecture
    — A28F200BX-T, A28F200BX-B
    — For High Performance AND High Integration 16-bit AND 32-bit CPUs
■ Optimized High Density BLOCKed Architecture
    — One 16 KB Protected BOOT BLOCK
    — Two 8 KB Parameter BLOCKs
    — One 96 KB Main BLOCK
    — One 128 KB Main BLOCK
    — Top or Bottom BOOT Locations
■ Extended Cycling Capability
    — 1,000 BLOCK Erase Cycles
■ Automated Word/Byte Write AND BLOCK Erase
    — CommAND User Interface
    — Status Register
    — Erase Suspend Capability
SRAM-Compatible Write Interface
■ Automatic Power Savings Feature
    — 1 mA Typical ICC Active Current in
    Static Operation
■ Hardware Data Protection Feature
    — Erase/Write Lockout during Power Transitions
■ Very High-Performance Read
    — 90 ns Maximum Access Time
    — 45 ns Maximum Output Enable Time
■ Low Power Consumption
    — 25 mA Typical Active Read Current
■ Deep Power-Down/Reset Input
    — Acts as Reset for BOOT Operations
■ Automotive Temperature Operation
    — b40§C to a125§C
■ Write Protection for BOOT BLOCK
■ Industry StANDard Surface Mount Packaging
    — JEDEC ROM Compatible 44-Lead PSOP
■ 12V Word/Byte Write AND BLOCK Erase
    — VPP e 12V g5% StANDard
■ ETOXTM III FLASH Technology
    — 5V Read
■ Independent Software Vendor Support

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Part Name(s) : M36DR432AD M36DR432AD10ZA M36DR432AD10ZA6 M36DR432AD10ZA6T M36DR432AD12ZA M36DR432AD12ZA6 M36DR432AD12ZA6T M36DR432AD85ZA M36DR432AD85ZA6 M36DR432AD85ZA6T M36DR432ADZA M36DR432BD M36DR432BD10ZA M36DR432BD10ZA6 M36DR432BD10ZA6T M36DR432BD12ZA M36DR432BD12ZA6 M36DR432BD12ZA6T M36DR432BD85ZA M36DR432BD85ZA6 M36DR432BD85ZA6T M36DR432BDZA ST-Microelectronics
STMicroelectronics
Description : 32 MBIT (2Mb x16, Dual Bank, Page) FLASH MEMORY AND 4 MBIT (256Kb x16) SRAM, Multiple MEMORY Product

SUMMARY DESCRIPTION
The M36DR432AD/BD is a low-voltage Multiple MEMORY Product which combines two MEMORY de vices: a 32 MBIT (2MBIT x16) non-volatile FLASH MEMORY AND a 4 MBIT SRAM.
The MEMORY is available in a Stacked LFBGA66 12x8mm - 8x8 active ball array, 0.8mm pitch pack age AND supplied with all the bits erased (set to ‘1’).

FEATURES SUMMARY
■ Multiple MEMORY Product
   – 1 bank of 32 MBIT (2Mb x16) FLASH MEMORY
   – 1 bank of 4 MBIT (256Kb x16) SRAM
■ SUPPLY VOLTAGE
   – VDDF = VDDS =1.65V to 2.2V
   – VPPF = 12V for Fast Program (optional)
■ ACCESS TIMES: 85ns, 100ns, 120ns
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
   – Manufacturer Code: 0020h
   – Top Device Code, M36DR432AD: 00A0h
   – Bottom Device Code, M36DR432BD: 00A1h

FLASH MEMORY
MEMORY BLOCKS
   – Dual Bank MEMORY Array: 4 MBIT, 28 MBIT
   – Parameter BLOCKs (Top or Bottom location)
■ PROGRAMMING TIME
   – 10µs by Word typical
   – Double Word Program Option
■ ASYNCHRONOUS PAGE MODE READ
   – Page Width: 4 Words
   – Page Access: 35ns
   – RANDom Access: 85ns, 100ns, 120ns
■ DUAL BANK OPERATIONS
   – Read within one Bank while Program or
      Erase within the other
   – No delay between Read AND Write operations
BLOCK LOCKING
   – All BLOCKs locked at Power up
   – Any combination of BLOCKs can be locked
   – WPF for BLOCK Lock-Down
■ COMMON FLASH INTERFACE (CFI)
   – 64 bit Unique Device Identifier
   – 64 bit User Programmable OTP Cells
■ ERASE SUSPEND AND RESUME MODES
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK
■ 20 YEARS DATA RETENTION
   – Defectivity below 1ppm/year

SRAM
■ 4 MBIT (256Kb x16)
■ LOW VDDS DATA RETENTION: 1.0V
■ POWER DOWN FEATURES USING TWO CHIP ENABLE INPUTS

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