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Part Name(s) : PLL103-02 PLL103-02XI PLL103-02XC PLL103-02XM ETC1
Unspecified
Description : DDR SDRAM Buffer for Desktop PCs with 4 DDR DIMMS

[PLL]

DESCRIPTIONS
The PLL103-02 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. The device has 24 outputs. These outputs can be configured to support four unbuffered DDR DIMMS or to support 2 unbuffered standard SDRAM DIMMS and 2 DDR DIMMS. The PLL103-02 can be used in conjunction with the PLL202-04 or similar clock synthesizer for the VIA Pro 266 chipset. The PLL103-02 also has an I2C interface, which can enable or disable each output clock. When power up, all output clocks are enabled (has internal pull up).

FEATURES
• Generates 24 output buffer from one input.
• Supports up to four DDR DIMMS or 2 SDRAM DIMMS.
• Supports 266MHz DDR SDRAM.
• One additional output for feedback.
• Less than 5ns delay.
• Skew between any outputs is less than 100 ps.
• 2.5V or 3.3V Supply range.
• Enhanced DDR and SDRAM Output Drive selected by I2C.
• Available in 48 pin SSOP.

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Part Name(s) : ICS93725 ICS93725YFT ICST
Integrated Circuit Systems
Description : DDR and SDRAM Zero Delay Buffer

Product Description/Features:
• Low skew, Zero Delay Buffer
• 1 to 13 SDRAM PC133 clock distribution
• 1 to 6 pairs of DDR clock distribution
• I2C for functional and output control
• Separate feedback path for both memory mode to adjust synchronization.
• Supports up to 2 DDR DIMMs or 3 SDRAM DIMMs
• Frequency support for up to 200MHz
• Individual I2C clock stop for power mananagement
• CMOS level control signal input

Recommended Application:
    DDR & SDRAM Zero Delay Buffer for SIS 635/640/645/650 & 735/740/746 style chipsets.

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Part Name(s) : M312L2828ET0 M312L3223ETS M312L6420ETS M312L6423ETS M383L2828ET1 M383L3223ETS M383L6420ETS M383L6423ETS Samsung
Samsung
Description : DDR SDRAM Registered Module

184pin Registered Module based on 256Mb E-die (x4, x8) with 1,700 / 1,200mil Height & 72-bit ECC

 

256MB, 32M x 72 ECC Module (M383(12)L3223ETS) (Populated as 1 bank of x8 DDR SDRAM Module)

512MB, 64M x 72 ECC Module (M383(12)L6423ETS) (Populated as 2 bank of x8 DDR SDRAM Module)

512MB, 64M x 72 ECC Module (M383(12)L6420ETS) (Populated as 1 bank of x4 DDR SDRAM Module)

1GB, 128M x 72 ECC Module [M383(12)L2828ET1(0)] (Populated as 2 bank of x4 DDR SDRAM Module)

 

 

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Part Name(s) : EBD11UD8ABFB EBD11UD8ABFB-6B EBD11UD8ABFB-7A EBD11UD8ABFB-7B EBD11UD8ABFB-6A Elpida
Elpida Memory, Inc
Description : 1GB Unbuffered DDR SDRAM DIMM

Description
The EBD11UD8ABFB is 128M words ×64 bits, 2 banks Double Data Rate (DDR) SDRAM unbuffered
module, mounted 16 pieces of 512M bits DDR SDRAM sealed in TSOP package.

 

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Part Name(s) : NT5DS16M8AT NT5DS32M4AT NT5DS32M4AT-7K NT5DS16M8AT-7K NT5DS32M4AT-75B NT5DS16M8AT-75B NT5DS32M4AT-8B NT5DS16M8AT-8B Nanya
Nanya Technology
Description : 128MB Double Data Rate SDRAM

Description
The 128MB DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. It is internally configured as a quad-bank DRAM.
The 128MB DDR SDRAM uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the 128MB DDR SDRAM effectively consists of a single 2n-bit wide, one clock cycle data transfer at the internal DRAM core and two corresponding n-bit wide, one-half-clock-cycle data transfers at the I/O pins.
A bidirectional data strobe (DQS) is transmitted externally, along with data, for use in data capture at the receiver. DQS is a strobe transmitted by the DDR SDRAM during Reads and by the memory controller during Writes. DQS is edge-aligned with data for Reads and center-aligned with data for Writes.

Features
• Double data rate architecture: two data transfers per clock cycle
• Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver
• DQS is edge-aligned with data for reads and is center aligned with data for writes
• Differential clock inputs (CK and CK)
• Four internal banks for concurrent operation
• Data mask (DM) for write data
• DLL aligns DQ and DQS transitions with CK transitions, also aligns QFC transitions with CK during Read cycles • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS
• Burst lengths: 2, 4, or 8
• CAS Latency: 2, 2.5
• Auto Precharge option for each burst access
• Auto Refresh and Self Refresh Modes
• 15.6ms Maximum Average Periodic Refresh Interval
• Supports tRAS lockout feature
• 2.5V (SSTL_2 compatible) I/O
• VDDQ = 2.5V ± 0.2V
• VDD = 2.5V ± 0.2V
• -7K parts support PC2100 modules.
   -75B parts support PC2100 modules
   -8B parts support PC1600 modules

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Part Name(s) : V826632K24SXTG-A1 V826632K24SXTG-B0 V826632K24SXTG-B1 V826632K24S Mosel-Vitelic
Mosel Vitelic Corporation
Description : 2.5 VOLT 32M x 64 HIGH PERFORMANCE UNBUFFERED DDR SDRAM MODULE

Description
The V826632K24S memory module is organized 33,554,432 x 64 bits in a 184 pin memory module. The 16M x 64 memory module uses 8 Mosel-Vitelic 32M x 8 DDR SDRAM. The x64 modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.

Features
■ 184 Pin Unbuffered 33,554,432 x 64 bit Organization DDR SDRAM Modules
■ Utilizes High Performance 32M x 8 DDR SDRAM in TSOPII-66 Packages
■ Single +2.5V (± 0.2V) Power Supply
■ Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
■ Auto Refresh (CBR) and Self Refresh
■ All Inputs, Outputs are SSTL-2 Compatible
■ 8192 Refresh Cycles every 64 ms
■ Serial Presence Detect (SPD)
DDR SDRAM Performance

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Part Name(s) : V826532K04S V826532K04SXTG-A1 V826532K04SXTG-B0 V826532K04SXTG-B1 Mosel-Vitelic
Mosel Vitelic Corporation
Description : 2.5 VOLT 32M x 64 HIGH PERFORMANCE UNBUFFERED DDR SDRAM MODULE

Description
The V826532K04S memory module is organized 33,554,432 x 64 bits in a 184 pin memory module. The 32M x 64 memory module uses 16 Mosel-Vitelic 16M x 8 DDR SDRAM. The x64 modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.

Features
■ 184 Pin Unbuffered 33,554,432 x 64 bit Organization DDR SDRAM Modules
■ Utilizes High Performance 16M x 8 DDR SDRAM in TSOPII-66 Packages
■ Single +2.5V (± 0.2V) Power Supply
■ Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
■ Auto Refresh (CBR) and Self Refresh
■ All Inputs, Outputs are SSTL-2 Compatible
■ 4096 Refresh Cycles every 64 ms
■ Serial Presence Detect (SPD)
DDR SDRAM Performance

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Part Name(s) : V827332K04S V827332K04SXTG-A1 V827332K04SXTG-B0 V827332K04SXTG-B1 Mosel-Vitelic
Mosel Vitelic Corporation
Description : 2.5 VOLT 32M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE

Description
The V827332K04S memory module is organized 33,554,432 x 72 bits in a 184 pin memory module. The 32M x 72 memory module uses 18 Mosel-Vitelic 16M x 8 DDR SDRAM. The x72 modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.

Features
■ 184 Pin Unbuffered 33,554,432 x 72 bit Organization DDR SDRAM Modules
■ Utilizes High Performance 16M x 8 DDR SDRAM in TSOPII-66 Packages
■ Single +2.5V (± 0.2V) Power Supply
■ Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
■ Auto Refresh (CBR) and Self Refresh
■ All Inputs, Outputs are SSTL-2 Compatible
■ 4096 Refresh Cycles every 64 ms
■ Serial Presence Detect (SPD)
DDR SDRAM Performance

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Part Name(s) : V827464K24S V827464K24SXTG-A1 V827464K24SXTG-B0 V827464K24SXTG-B1 V827464K24SXTG-C0 Mosel-Vitelic
Mosel Vitelic Corporation
Description : 2.5 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE

Description
The V827464K24S memory module is organized 67,108,864 x 72 bits in a 184 pin memory module. The 64M x 72 memory module uses 18 MoselVitelic 32M x 8 DDR SDRAM. The x72 modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.

Features
■ 184 Pin Unbuffered 67,108,864 x 72 bit Organization DDR SDRAM Modules
■ Utilizes High Performance 32M x 8 DDR SDRAM in TSOPII-66 Packages
■ Single +2.5V (± 0.2V) Power Supply
■ Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
■ Auto Refresh (CBR) and Self Refresh
■ All Inputs, Outputs are SSTL-2 Compatible
■ 8196 Refresh Cycles every 64 ms
■ Serial Presence Detect (SPD)
DDR SDRAM Performance

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Part Name(s) : V827432K24S V827432K24SXTG-A1 V827432K24SXTG-B0 V827432K24SXTG-B1 V827432K24SXTG-C0 Mosel-Vitelic
Mosel Vitelic Corporation
Description : 2.5 VOLT 32M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE

Description
The V827432K24S memory module is organized 33,554,432 x 72 bits in a 184 pin memory module. The 32M x 72 memory module uses 9 Mosel-Vitelic 32M x 8 DDR SDRAM. The x72 modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.

Features
■ 184 Pin Unbuffered 33,554,432 x 72 bit Organization DDR SDRAM Modules
■ Utilizes High Performance 32M x 8 DDR SDRAM in TSOPII-66 Packages
■ Single +2.5V (± 0.2V) Power Supply
■ Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
■ Auto Refresh (CBR) and Self Refresh
■ All Inputs, Outputs are SSTL-2 Compatible
■ 8196 Refresh Cycles every 64 ms
■ Serial Presence Detect (SPD)
DDR SDRAM Performance

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