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Description : 10-LINE to 4-LINE AND 8-LINE to 3-LINE PRIORITY ENCODEERS

The SN74LS147 AND the SN74LS148 are PRIORITY Encoders. They provide PRIORITY decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs AND outputs which are active at the low logic level.

 

Description : 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS LOW POWER SCHOTTKY

10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS

The SN54/74LS147 AND the SN54/74LS148 are PRIORITY Encoders. They provide PRIORITY decoding of the inputs to ensure that only the highest order dataline is encoded.Both devices have data inputs AND outputs which are active at the low logic level.
TheLS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied decimalzero condition does not require an input condition because zero is encoded when all nine data lines are at a high logic level.
TheLS148 encodes eight data lines to three-line (4-2-1)binary (octal). By providingcascading circuitry (Enable Input EI AND Enable Output EO) octal expansion is allowed without needing external circuitry.

 

 

Part Name(s) : 74LS148
Hitachi
Hitachi -> Renesas Electronics
Description : 8 Line to 3 Line octal PRIORITY Encoders

8 Line to 3 Line octal PRIORITY Encoders

Motorola
Motorola => Freescale
Description : 8-LINE to 3-LINE PRIORITY encoder

8-LINE TO 3-LINE PRIORITY ENCODER FAST™ SHOTTKY TTL

The MC54/74F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating thepresence of anyactive input. It is easily expANDed via input AND output enables to provide PRIORITY encoding over many bits.


• Encodes Eight Data Lines in PRIORITY
• Provides 3-Bit Binary PRIORITY Code
• Input Enable Capability
• Signals When Data Present on Any Input
• Cascadable for PRIORITY Encoding of n Bits

Description : 10 Line to 4 Line BCD PRIORITY Encoder

Description
CD40147BMS CMOS encoder features PRIORITY encoding of the inputs to ensure that only the highest order data line is encoded. Ten data input lines (0-9) are encoded to four line (8,4, 2, 1) BCD. The highest PRIORITY line is line 9. All four output lines are logic 1 (VSS) when all input lines are logic 0. All inputs AND outputs are buffered, AND each output can drive one TTL low power Schottky load. The CD40147BMS is func tionally similar to the TTL 54/74147 if pin 15 is tied low.

Features
• High Voltage Type (20V Rating)
• Encodes 10 Line to 4 Line BCD
• Active Low Inputs AND Outputs
• 100% Tested for Quiescent Current at 20V
• 5V, 10V AND 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack age Temperature Range; 100nA at 18V AND +25oC
• Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V
• StANDardized Symmetrical Output Characteristics
• Meets All Requirements of JEDEC Tentative StANDard No. 13B, “StANDard Specifications for Description of ‘B’ Series CMOS Devices”

Applications
• Keyboard Encoding
• 10 Line to BCD Encoding
• Range Selection

Description : 10 TO 4 LINE BCD PRIORITY ENCODER

DESCRIPTION
The HCC/HCF40147B CMOS encoder features PRIORITY encoding of the inputs to ensure that only the highest order data line is encoded. Ten data input lines (0-9) are encoded to four line (8, 4, 2, 1) BCD. The highest PRIORITY line is line 9. All four output lines are logic 1 (VSS) when all input lines are logic 0. All inputs AND outputs are buffered, AND each output can drive one TTL Low Power Schottky load. The HCC/HCFF40147 is functionally similar to the T54/T74LS147 if pin 15 is tied low.

■ ENCODES 10 LINE TO 4 LINE BCD
■ ACTIVE LOW INPUTS AND OUTPUTS
■ STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERIZATION
■ 100 % TESTED FOR QUIESCENT CURRENT AT 20 V
■ 5V, 10V AND 15V PARAMETRIC RATINGS
■ MAXIMUM INPUT CURREENT OF 1 µA AT 18V OVER FULL PACKAGE TEMPERATURE RANGE; 100 nA AT 18 V AND 25 oC
■ NOISE MARGIN (FULL PACKAGE TEMPERATURE RANGE): 1V AT VDD = 5V, 2V AT VDD = 10V, 2.5V AT VDD = 15V

APPLICATIONS:
■ KEYBOARD ENCODING
■ 10 LINE TO BCD ENCODING
■ RANGE SELECTION

Renesas
Renesas Electronics
Description : Dual 2-line-to-4-LINE Decoders / Demultiplexers

Dual 2-line-to-4-LINE Decoders / Demultiplexers

This circuit features dual 1-line-to-4-LINE demultiprexer with individual strobes AND common binary-address input. When both sections are enabled by the strobes, the common binary-address inputs sequentially select AND route associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted through its outputs. The inverter following the 1C data input permits use as a 3-to-8-LINE decoder or 1-to-8-LINE demultiplexer without external gating.

Renesas
Renesas Electronics
Description : 8-LINE-to-3-LINE Octal PRIORITY Encoder

The HD74LS148 encodes eight data lines to three-line (4-2-1) binary (octal). Cascading circuitry (enable input EI AND enable output EO) has been provided to allow octal expansion without the need for external circuitry. The data inputs AND outputs are active at the low logic level.

Part Name(s) : 74F148CW
Fairchild
Fairchild Semiconductor
Description : 8-LINE to 3-LINE PRIORITY Encoder

General Description
The F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expANDed via input AND output enables to provide PRIORITY encoding over many bits.
   
Features
■ Encodes eight data lines in PRIORITY
■ Provides 3-bit binary PRIORITY code
■ Input enable capability
■ Signals when data is present on any input
■ Cascadable for PRIORITY encoding of n bits
   

Fairchild
Fairchild Semiconductor
Description : 8-LINE to 3-LINE PRIORITY Encoder

General Description
The F148 provides three bits of binary coded output repre senting the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expANDed via input AND output enables to provide PRIORITY encoding over many bits.

Features
■ Encodes eight data lines in PRIORITY
■ Provides 3-bit binary PRIORITY code
■ Input enable capability
■ Signals when data is present on any input
■ Cascadable for PRIORITY encoding of n bits

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