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Part Name(s) : FAN1654 FAN1654MTF FAN1654MTFX FAN1654M FAN1654MX Fairchild
Fairchild Semiconductor
Description : 1.5A LDO, DDR BUS TERMINATION REGULATOR View

Description
The FAN1654 is a low-cost bi-directional LDO specifically designed for terminating DDR memory BUS. It can both sink and source up to 1A continuous, 1.5A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = (VDDQ/2) ± 40mV.

Features
• Sinks and sources 1A continuous, 1.5A peak
• -40°C to +125°C Operating Range
• Load regulation: (VDDQ/2) ± 40mV
• 5mA VREF buffer tracks VTT
• On-chip thermal limiting
• Power-enhanced eTSSOP™-16 package
• Low Current Shutdown Mode
• Output Short Circuit Protection

Applications
DDR terminators

Part Name(s) : CM3107 CM3107-00SB CM3107-12SH CM3107-00SH CM3107-00SN CM310701S CM3107-00SM CALMIRCO
California Micro Devices Corp
Description : 2 Amp Source/ Sink BUS TERMINATION REGULATOR for DDR Memory and Front Side BUS Applications View

Product Description
The CM3107 is a sinking and sourcing REGULATOR specifically designed for series-parallel BUS TERMINATION for high-speed chip set BUSses as well as DDR memory systems. It can source and sink current up to 2.0A with a load regulation of 0.5%. The VTT output voltage is selectable by VDDQSEL and FSBSEL pins. The VDDQSEL pin controls whether the CM3107 is in DDR memory mode with VTT=VDDQ/2, or in FSB mode. In FSB mode, FSBSEL controls whether VTT is 1.225V or 1.45V. This allows the same chip to be used in two different circuits on an Intel 865-based motherboard.

Features
• Ideal for Intel 865 Front Side BUS VTT and DDR VTT applications
• Sinks and sources 2 Amps
• Over current protection
• Over temperature protection
• Integrated power MOSFETs
• Excellent accuracy (0.5% load regulation)
• Selectable output (1.225V/1.45V or VDDQ/2)
• 8-lead SOIC and PSOP packages
• Lead-free versions available

Applications
• Intel 865/845 Front Side BUS TERMINATION
• Single and dual DDR memory TERMINATION
• Active TERMINATION BUSes
• Graphics card DDR memory TERMINATION

Part Name(s) : SC2596 SC2596EVB SC2596SETRT ETC
Unspecified
Description : Low Voltage Integrated DDR TERMINATION REGULATOR View

[Semtech]

Description
The SC2596 is an integrated linear DDR TERMINATION device, which provides a complete solution for DDR TERMINATION REGULATOR designs; while meeting the JEDEC requirements of SSTL-2 and SSTL-18 specifications for DDR-SDRAM TERMINATION.

Features
◆ Sourcing or sinking 2.5A for DDR-I
◆ Sourcing or sinking 1.5A for DDR-II
◆ AVCC undervoltage lockout
◆ Reference output
◆ Minimum number of external components
◆ Accurate internal voltage divider
◆ Disable function, puts device into sleep mode
◆ Thermal shutdown
◆ Over current protection
◆ Available in SOIC-8 EDP package
◆ WEEE and RoHS compliant

Applications
DDR-I and DDR-II memory TERMINATION
◆ SSTL-2 and SSTL-3 TERMINATION
◆ HSTL TERMINATION
◆ PC motherboards
◆ Graphics boards
◆ Disk drives
◆ CD-ROM drives

Part Name(s) : SC2596 SC2596EVB SC2596SETRT SC2596 SC2596SETRT SC2596EVB Semtech
Semtech Corporation
Description : Low Voltage Integrated DDR TERMINATION REGULATOR View

Description
The SC2596 is an integrated linear DDR TERMINATION device, which provides a complete solution for DDR TERMINATION REGULATOR designs; while meeting the JEDEC requirements of SSTL-2 and SSTL-18 specifications for DDR-SDRAM TERMINATION.

Features
◆ Sourcing or sinking 2.5A for DDR-I
◆ Sourcing or sinking 1.5A for DDR-II
◆ AVCC undervoltage lockout
◆ Reference output
◆ Minimum number of external components
◆ Accurate internal voltage divider
◆ Disable function, puts device into sleep mode
◆ Thermal shutdown
◆ Over current protection
◆ Available in SOIC-8 EDP package
◆ WEEE and RoHS compliant

Applications
DDR-I and DDR-II memory TERMINATION
◆ SSTL-2 and SSTL-3 TERMINATION
◆ HSTL TERMINATION
◆ PC motherboards
◆ Graphics boards
◆ Disk drives
◆ CD-ROM drives


Part Name(s) : FAN6555 FAN6555M FAN6555MX Fairchild
Fairchild Semiconductor
Description : 2A DDR BUS TERMINATION REGULATOR View

Description
The FAN6555 switching REGULATOR is designed to convert voltage supplies ranging from 2.3V to 4V into a desired output voltage or TERMINATION voltage for DDR SDRAM memory. The FAN6555 can be implemented to produce regulated output voltages in two different modes. In the default mode, when the VREFpin is open, the FAN6555 output voltage is 50% of the voltage applied to VCCQ.

Features
• Can source and sink up to 2A continous, 3A peak
• No heatsink required
• Integrated Power MOSFETs
• Generates TERMINATION voltages for DDR SDRAM
• VREF input available for external voltage divider
• Separate voltages for VCCQand PVDD
• Buffered VREF output
• VOUT of ±3% or less at 2A
• Minimum external components
• 16-pin SOIC package
• -40°C to +85°C operating temperature range
• Shutdown for standby or suspend mode operation
• Thermal Shutdown ≈130ºC

Part Name(s) : LP2996 LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX LP2996MX National-Semiconductor
National ->Texas Instruments
Description : DDR TERMINATION REGULATOR View

General Description
The LP2996 linear REGULATOR is designed to meet the JEDEC SSTL-2 specifications for TERMINATION of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM TERMINATION. The LP2996 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

Features
Source and sink current
Low output voltage offset
No external resistors required
Linear topology
Suspend to Ram (STR) functionality
Low external component count
Thermal Shutdown
Available in SO-8, PSOP-8 or LLP-16 packages

Applications
DDR-I and DDR-II TERMINATION Voltage
SSTL-2 and SSTL-3 TERMINATION
HSTL TERMINATION

Part Name(s) : W83310S W83310SG Winbond
Winbond
Description : BUS TERMINATION REGULATOR With Over Temp. & Current Limit View

GENERAL DESCRIPTION
The W83310S is a linear REGULATOR which provides achieves continuous 1.8 Amp bi-directional sinking
and driving capability for DDR SDRAM BUS terminator application.

FEATURES
Regulates a bi-directional power with driving and sinking capability
Provides achieve continuous 1.8Amp driving and sinking current
Power MOSFET integrated
Low external component count
Low output voltage offset
Operates with +3.3V and +2.5V control power
Current limit protection
Over temperature protection
Power package SOP-8
Low cost and easy to use

APPLICATIONS
DDR and DDR II BUS TERMINATION REGULATOR
Active TERMINATION BUS
SSTL-2
SSTL-3

Part Name(s) : LP2994 LP2994M LP2994MX National-Semiconductor
National ->Texas Instruments
Description : DDR TERMINATION REGULATOR View

General Description
The LP2994 REGULATOR is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications (Series Stub TERMINATION Logic) for active TERMINATION of DDR SDRAM. The device utilizes an internal operational amplifier to provide linear regulation of VTT without the need for expensive external components. The output stage prevents shoot through while delivering 1.5A continuous current and maintaining excellent load regulation. The LP2994 also in corporates an active low shutdown pin to tri-state the output during Suspend To Ram (STR) states.

Features
■ Source and sink current
■ Low external component count
■ Independent analog and power rails
■ Linear topology
■ Small package SO-8
■ Low cost and easy to use
■ Shutdown pin

Applications
■ SSTL-2
■ SSTL-3
DDR-SDRAM TERMINATION
DDR-II TERMINATION

 

Part Name(s) : RT9005A RT9005B RT9005APSP RT9005BPSP RT9005AGSP RT9005BGSP Richtek
Richtek Technology
Description : DDR VDDQ and TERMINATION Voltage REGULATOR View

General Description
The RT9005A/B is a dual-output linear REGULATOR for DDRSDRAM VDDQ supply and TERMINATION voltage VTT supply.
The REGULATOR is capable of actively sinking or sourcing up to 2A. The output TERMINATION voltage can be tightly regulated to track 1/2 VDDQ by two external voltage divider resistors.

Features
• Ideal for DDR-I and DDR-II VDDQ, VTT Applications
• Integrated Power MOSFETs
• Generates TERMINATION Voltage for SSTL_2, SSTL _18, HSTL, SCSI-2 and SCSI-3 Interfaces
• High Accuracy Output Voltage at Full-Load
• VOUT2 Sink and Source 2A Continuous Current
• VOUT2 Adjustment by Two External Resistors
• Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output
• Current Limiting Protection
• On-Chip Thermal Protection
• Available in SOP-8 (Exposed Pad) Packages
• RoHS Compliant and 100% Lead (Pb)-Free

Applications
• Desktop PCs, Notebooks, and Workstations
• Graphics Card Memory TERMINATION
• Set Top Boxes, Digital TVs, Printers
• Embedded Systems
• Active TERMINATION BUSes
DDR-I and DDR-II Memory Systems

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