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XRT91L82 Datasheet PDF - Exar Corporation

Part NameDescriptionManufacturer
XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER Exar
Exar Corporation Exar
Other PDF  no available.
XRT91L82 Datasheet PDF : XRT91L82 pdf   
XRT91L82 image

GENERAL DESCRIPTION
The XRT91L82 is a fully integrated SONET/SDH transceiver for OC-48/STM16 applications supporting the use of Forward Error Correction (FEC) capability. The transceiver includes an on-chip Clock Multiplier Unit (CMU), which uses a high frequency PhaseLocked Loop (PLL) to generate the high-speed transmit serial clock from slower external clock references. It also provides Clock and Data Recovery (CDR) functions by synchronizing its on-chip Voltage Controlled Oscillator (VCO) to the incoming serial data stream.

FEATURES
• 2.488 / 2.666 Gbps Transceiver
• Targeted for SONET OC-48/SDH STM-16 Applications
• Selectable full duplex operation between standard rate of 2.488 Gbps or Forward Error Correction rate of 2.666 Gbps
• Single-chip fully integrated solution containing parallel-to-serial converter, clock multiplier unit (CMU), serialto-parallel converter, and clock data recovery (CDR) functions
• 16-bit Differential LVDS/LVPECL, or Single-Ended LVPECL signaling data paths running at 155.52/166.63 Mbps using internal input termination for reduced passive components on board
• Non-FEC and FEC rate REF1CLKP/N and REF2CLKP/N dual reference input ports
• Supports 155.52/166.63MHz or 77.76/83.31MHz transmit and receive external reference input ports
• Optional VCXO input port support multiple de-jittering modes in Host mode
• On-chip phase detector and charge pump for external VCXO based de-jittering PLL
• Internal FIFO decouples transmit parallel clock input and transmit parallel clock output
• Provides Local, Remote Serial and Remote Parallel Loopback modes as well as Loop Timing mode
• Diagnostics features include various lock detect functions and transmit CMU and receive CDR Lock Detect
• Host mode serial microprocessor interface simplifies monitor and control
• Meets Telcordia, ANSI and ITU-T jitter requirements including T1.105.03 - 2002 SONET Jitter Tolerance specification, GR-253 CORE, GR-253-ILR- SONET Jitter specifications.
• Operates at 1.8V CMOS and CML Power with 3.3V I/O
• 500mW Typical Power Dissipation using LVDS Interface
• Package: 15 x 15 mm 196-pin STBGA
• IEEE 1149.1 Compatable JTAG port

APPLICATIONS
• SONET/SDH-based Transmission Systems
• Add/Drop Multiplexers
• Cross Connect Equipment
• ATM and Multi-Service Switches, Routers and Switch/Routers
• DSLAMS
• SONET/SDH Test Equipment
• DWDM Termination Equipment

 

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