Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site
HOME  >>>  ETC  >>> NT256S72V89A0G PDF

NT256S72V89A0G Datasheet PDF - ETC

Part Name
Other PDF
  no available.
NT256S72V89A0G Datasheet PDF : NT256S72V89A0G pdf     
NT256S72V89A0G-7K image


NT256S72V89A0G is unbuffered 168-pin Synchronous DRAM Dual In-Line Memory Modules (DIMM) which is organized as 32Mx72 high-speed memory arrays and is configured as one 32M x 72 physical bank. The DIMM uses nine 32Mx8 SDRAMs in 400mil TSOP II packages. The DIMM achieves high-speed data transfer rates of up to 133MHz by employing a prefetch / pipeline hybrid architecture that supports the JEDEC 1N rule while allowing very low burst power.

● 168-Pin Unbuffered 8-Byte Dual In-Line Memory Module
● Intended for PC133 applications
    - Clock Frequency: 133MHz
    - Clock Cycle: 7.5ns
    - Clock Assess Time: 5.4ns
● Inputs and outputs are LVTTL (3.3V) compatible
● Single 3.3V ± 0.3V Power Supply
● Single Pulsed RAS interface
● SDRAMs have 4 internal banks
● Module has 1 physical bank
● Fully Synchronous to positive Clock Edge
● Data Mask for Byte Read/Write control
● Auto Refresh (CBR) and Self Refresh
● Automatic and controlled Precharge commands
● Programmable Operation:
    - CAS Latency: 2, 3
    - Burst Type: Sequential or Interleave
    - Burst Length: 1, 2, 4, 8
    - Operation: Burst Read and Write or Multiple Burst Read with Single Write
● Suspend Mode and Power Down Mode
● 8192 Refresh cycles distributed across 64ms
● Gold contacts
● SDRAMs in TSOP Type II Package
● Serial Presence Detect with Write Protect


Share Link: 

한국어 简体中文 日本語 русский español

All Rights Reserved©  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]