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MC74LVX138DR2G Datasheet PDF - ON Semiconductor

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MC74LVX138DR2G Datasheet PDF : MC74LVX138DR2G pdf     
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The MC74LVX138 is an advanced high speed CMOS 3−to−8 line decoder. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.
When the device is enabled, three Binary Select inputs (A0 − A2) determine which one of the outputs (O0 − O7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems.

• High Speed: tPD = 5.5 ns (Typ) at VCC = 3.3 V
• Low Power Dissipation: ICC = 4μA (Max) at TA = 25 °C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: VOLP = 0.5 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
    Human Body Model > 2000 V;
    Machine Model > 200 V
• Pb−Free Packages are Available*


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