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HYM72V8025GS-50 Datasheet PDF - Infineon Technologies

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MFG CO.
HYM72V8025GS-50
Infineon
Infineon Technologies Infineon
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HYM72V8025GS-50 Datasheet PDF : HYM72V8025GS-50 pdf     
HYM72V8035GS-50 image

8M × 72-Bit EDO- DRAM Module (ECC - Module) 168 pin buffered DIMM Module

The HYM 72V8025/35GS-50/-60 is a 64 MByte DRAM module organized as 8 388 608 words by 72-bit in a 168-pin, dual read-out, single-in-line package comprising nine HYB3165805AJ/AT 8M × 8 DRAMs in 400 mil wide SOJ or TSOPII - packages mounted together with ceramic decoupling capacitors on a PC board. All inputs except RAS and DQ are buffered by using BiCMOS buffers/line drivers.
Each HYB3165805AJ/AT is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed.
The density and speed of the module can be detected by the use of presence detect pins.

• 168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications
• 1 bank 8 M x 72 organisation
• Optimized for ECC applications
• Hyper Page Mode - EDO Operation
• Performance:

• Single + 3.3V ± 0.3 V supply
• CAS-before-RAS refresh, RAS-only refresh
• Decoupling capacitors mounted on substrate
• All inputs, outputs and clock fully LVTTL & LVCMOS compatible
• 4 Byte interleave enabled, Dual Address inputs (A0/B0)
• Buffered inputs excepts RAS and DQ
• Parallel Presence Detects
• Utilizes nine 8M × 8 -DRAMs and BiCMOS buffers/line drivers VT244A
• Two versions: HYM 72V8035GS with SOJ-components ( 9 mm module thickness)
                         HYM 72V8025GS with TSOPII-components ( 4 mm module thickness)
• 4048 refresh cycles / 64 ms with 12 / 11 addressing
• Gold contact pad
• Double sided module with 25.35 mm (1000 mil) height

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