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HSP50210 Datasheet PDF - Renesas Electronics

Part Name
Description
MFG CO.
HSP50210
Renesas
Renesas Electronics Renesas
Other PDF
  no available.
PDF
HSP50210 Datasheet PDF : HSP50210 pdf     
HSP50210 image

The Digital Costas Loop (DCL) performs many of the baseband processing tasks required for the demodulation of BPSK, QPSK, 8-PSK, OQPSK, FSK, AM and FM waveforms. These tasks include matched filtering, carrier tracking, symbol synchronization, AGC, and soft decision slicing. The DCL is designed for use with the HSP50110 Digital Quadrature Tuner to provide a two chip solution for digital down conversion and demodulation.

Features
• Clock Rates Up to 52MHz
• Selectable Matched Filtering with Root Raised Cosine or Integrate and Dump Filter
• Second Order Carrier and Symbol Tracking Loop Filters
• Automatic Gain Control (AGC)
• Discriminator for FM/FSK Detection and Discriminator Aided Acquisition
• Swept Acquisition with Programmable Limits
• Lock Detector
• Data Quality and Signal Level Measurements
• Cartesian-to-Polar Converter
• 8-Bit Microprocessor Control - Status Interface
• Designed to Work With the HSP50110 Digital Quadrature Tuner
• 84 Lead PLCC
• Pb-Free Available (RoHS compliant)

Applications
• Satellite Receivers and Modems
• BPSK, QPSK, 8-PSK, OQPSK, FSK, AM and FM Demodulators
• Digital Carrier Tracking
• Related Products: HSP50110 Digital Quadrature Tuner, D/A Converters HI5721, HI5731, HI5741
• HSP50110/210EVAL Digital Demod Evaluation Board

 

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