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HD74AC112 Datasheet PDF - Hitachi -> Renesas Electronics

Part Name
Description
MFG CO.
HD74AC112
Hitachi
Hitachi -> Renesas Electronics Hitachi
Other PDF
  no available.
PDF
HD74AC112 Datasheet PDF : HD74AC112 pdf     
HD74LS112 image

Description
The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will perform according to the Truth Table as long as minimum setup and hold times are observed. Input data is transferred to the outputs on the falling edge of the clock pulse.

Features
• Outputs Source/Sink 24 mA
• HD74ACT112 has TTL-Compatible Inputs

 

Part Name
Description
PDF
MFG CO.
Dual JK negative edge-triggered flip-flop
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DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
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DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
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Dual JK Negative Edge-Triggered Flip-Flop
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DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
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Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
Fairchild Semiconductor
Dual JK Negative Edge-Triggered Flip-Flop
Fairchild Semiconductor
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY
Motorola => Freescale
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Motorola => Freescale

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