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GS8170LW36AC Datasheet PDF - Giga Semiconductor

Part NameDescriptionManufacturer
GS8170LW36AC 18Mb Σ1x1Lp CMOS I/O Late Write SigmaRAM™ GSI
Giga Semiconductor GSI
Other PDF  no available.
GS8170LW36AC Datasheet PDF : GS8170LW36AC pdf   
GS8170LW36AC image

SigmaRAM Family Overvie
GS8170LW36/72A SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high performance networking systems.

• Late Write mode, Pipelined Read mode
• JEDEC-standard SigmaRAM™ pinout and package
• 1.8 V +150/–100 mV core power supply
• 1.8 V CMOS Interface
• ZQ controlled user-selectable output drive strength
• Dual Cycle Deselect
• Burst Read and Write option
• Fully coherent read and write pipelines
• Echo Clock outputs track data output drivers
• Byte write operation (9-bit bytes)
• 2 user-programmable chip enable inputs
• IEEE 1149.1 JTAG-compliant Serial Boundary Scan
• 209-bump, 14 mm x 22 mm, 1 mm bump pitch BGA package
• Pin-compatible with future 36Mb, 72Mb, and 144Mb devices
• Pb-Free 209-bump BGA package available


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